Message-based memory access apparatus and access method thereof

Patent metadata

Field	Value
Publication number	US-9870327-B2
Application number	US-201414335029-A
Country	US
Kind code	B2
Filing date	Jul 18, 2014
Priority date	Jan 18, 2012
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

A message-based memory access apparatus and an access method thereof are disclosed, The message-based memory access apparatus includes: a message-based command bus, configured to transmit a message-based memory access instruction generated by the CPU to instruct a memory system to perform a corresponding operation; a message-based memory controller, configured to package a CPU request into a message packet and sent the packet to a storage module, and parse a message packet returned by the storage module and return data to the CPU; a message channel, configured to transmit a request message packet and a response message packet; and the storage module, including a buffer scheduler, and configured to receive the request packet from the message-based memory controller and process the corresponding request.

First claim

What is claimed is:

1. A message-based memory access apparatus, comprising:
a central processing unit (CPU);
a message-based memory controller coupled to the CPU via a message-based command bus; and
a storage device coupled to the message-based memory controller via a message channel,
wherein the CPU is configured to generate a message-based memory access request instruction and transmit the message-based memory access request instruction to the message-based memory controller via the message-based command bus, wherein the message-based memory access request instruction instructs the message-based memory controller to perform a memory access operation,
wherein the message-based memory controller is configured to acquire a message-based memory access request according to the message-based memory access request instruction, set attributes of the message-based memory access request in a request state table, generate a plurality of division requests from the message-based memory access request according to the attributes, package one or more division requests into a message packet, and send the message packet to the storage device via the message channel, and wherein the message-based memory controller is further configured to parse a response packet returned by the storage device via the message channel to obtain data contained in the response packet and return the data to the CPU via the message-based command bus, and
wherein the storage device is configured to receive the message packet from the message-based memory controller, unpack the message packet to perform the memory access operation, produce the response packet, and send the response packet to the message-based memory controller.

2. The message-based memory access apparatus according to claim 1 , wherein the storage device comprises a buffer scheduler, the buffer scheduler is configured to attach the message-based memory access request with information about a data access priority for instructing scheduling of the message-based memory access request in the storage device.

3. The message-based memory access apparatus according to claim 2 , wherein the message-based memory controller further comprises:
a request reservation station, comprising the request state table, configured to assign a table entry in the request state table for the message-based memory access request, update the table entry in the request state table when a buffer scheduler of the storage device responds to the message-based memory access request, and delete the table entry in the request state table when the message-based memory controller sends a response that corresponds to the message-based memory access request to the CPU;
a request distributor, configured to determine, according to the table entry in the request state table, whether the message-based memory access request is inserted into the request state table, wherein, data to be read from or written to the storage device needs to be temporarily saved in a data buffer when the request is received; and
the data buffer, configured to temporarily save data of the request.

4. The message-based memory access apparatus according to claim 1 , wherein the message-based memory controller comprises:
a request generator configured to generate the plurality of division requests according to the set attributes in the request state table, and store the plurality of division requests in the request state table;
a request scheduler configured to schedule the one or more division requests, select a next division request among unprocessed requests generated by the request generator in the request state table, and send the selected division request to a message packetizer;
the message packetizer, configured to package the one or more division requests into the message packet and send the message packet through a message channel interface to a buffer scheduler of the storage device;
a message unpacker, configured to extract a request response from the response packet received from the storage device and parse corresponding data of the request response;
a request state update unit, configured to update a state table entry corresponding to a request in the request reservation station and temporarily save the data in a data buffer of the message-based memory controller, according to the request and the corresponding data obtained by parsing of the message unpacker;
a request response controller, configured to send the request response to the CPU;
a controller configuration interface, configured to configure a parameter of the message-based memory controller or specify attributes of the request, wherein corresponding values in the attributes in the request state table are updated after configuration of the request; and
the message channel interface, configured to transmit the message packet to the buffer scheduler.

5. The message-based memory access apparatus according to claim 3 , wherein the request reservation station is further configured to assign an item number to the request in the request state table, wherein the item number is used for the buffer scheduler to uniquely specify the request for processing.

6. The message-based memory access apparatus according to claim 4 , wherein the request response controller is further configured to query for a state of the request in the request reservation station, send the request response to the CPU after the request is processed by the storage device, and send corresponding data of the request in the data buffer after the request is processed.

7. The message-based memory access apparatus according to claim 1 , wherein the message packet comprises:
a memory access read request packet, a memory access write request packet, a special command request packet, or a memory state query packet.

8. The message-based memory access apparatus according to claim 1 , wherein a buffer scheduler in the storage device comprises:
a message channel interface, configured to transmit the message packet received from the message-based memory controller to a message unpacker of the storage device;
the message unpacker, configured to obtain information about a memory access request from the received message packet, wherein the information comprises a request serial number, a request type, request semantic information, required returning time, and granularity information of access data; and perform the unpacking operation according to corresponding rules after determining the request type based on the information about the memory access request;
a request distributor, configured to distribute the memory access request parsed by the message unpacker into a request queue, wherein the distributing operation depends on the request semantic information, the required returning time, and the granularity information of access data of each division request;
a plurality of request queues, configured to save unprocessed division requests, and the unprocessed division requests consist of queues with different priorities, wherein a high-priority queue stores requests whose access data is of a small granularity and the required returning time is short or requests marked with a high priority; and a low-priority queue stores requests whose access data is of a larger granularity and the required returning time is long or requests marked with a low priority;
a request scheduler, configured to obtain the memory access request from the plurality of request queues and forward the memory access request to a command generating unit, and obtain returned memory access data from a data buffer and forward the data to a message packetizer;
the command generating unit, configured to obtain the memory access request that needs to be executed after being scheduled, convert the memory a

Assignees

• Huawei Tech Co Ltd

Inventors

• Chen Mingyu
• Ruan Yuan
• Cui Zehan
• Chen Licheng
• Huang Yongbing
• Chen Mingyang

Classifications

• G06F13/4239

  with asynchronous protocol · CPC title

• G06F13/1673 Primary

  using buffers · CPC title