Bidirectional counter in a flash memory

Patent metadata

Field	Value
Publication number	US-9870316-B2
Application number	US-201615243359-A
Country	US
Kind code	B2
Filing date	Aug 22, 2016
Priority date	Apr 30, 2014
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

A method of storing a counter in at least two non-volatile memory pages, including: a step of initializing a page with an initial value and then, on each update of the counter value, a step of storing an update value and an opcode associated with this value, selected from a set of opcodes, the current value of the counter being given by application of the successive update operations to the initial value of the page.

First claim

The invention claimed is:

1. A method, comprising:
assigning at least two non-volatile memory pages of a memory to store counter value information;
storing an initial counter value in a page of the at least two non-volatile memory pages;
for each update of the stored initial counter value, storing an update value and an opcode associated with the update value in the page of the at least two non-volatile memory pages; and
determining a current counter value based on the stored initial value, stored update values and stored opcodes.

2. The method of claim 1 , comprising:
when the page is full,
calculating the current counter value; and
storing the calculated current counter value as an initial counter value in another page of the at least two non-volatile memory pages.

3. The method of claim 1 , comprising:
initializing the at least two non-volatile memory pages to a first state.

4. The method of claim 1 wherein the opcodes are selected from a set of opcodes comprising an addition opcode and a subtraction opcode.

5. The method of claim 1 wherein the opcodes are selected from a set of opcodes comprising an erase code.

6. The method of claim 1 wherein the opcodes are selected from a set of opcodes comprising a code to cancel a previous operation.

7. The method of claim 1 wherein a page comprises one of 32, 64, 128, 256, 512, 1,024, and 2,048 bytes.

8. An apparatus, comprising:
a non-volatile memory; and
circuitry, which, in operation:
assigns at least two pages of the non-volatile memory to store counter value information;
stores an initial counter value in a page of the at least two pages;
for each update of the stored initial counter value, stores an update value and an opcode associated with the update value in the page of the at least two pages; and
determines a current counter value based on the stored initial value, stored update values and stored opcodes.

9. The apparatus of claim 8 wherein when the page is full, the circuitry, in operation:
calculates the current counter value; and
stores the calculated current counter value as an initial counter value in another page of the at least two pages.

10. The apparatus of claim 8 wherein the circuitry, in operation, selectively initializes the at least two pages to a first state.

11. The apparatus of claim 8 wherein the circuitry, in operation, selects opcodes from a set of opcodes comprising an addition opcode and a subtraction opcode.

12. The apparatus of claim 8 wherein the circuitry, in operation, selects opcodes from a set of opcodes comprising an erase code.

13. The apparatus of claim 8 wherein the circuitry, in operation, selects opcodes from a set of opcodes comprising a code to cancel a previous operation.

14. The apparatus of claim 8 wherein the non-volatile memory is a flash memory.

15. The apparatus of claim 14 , comprising:
a near-field communication router including the flash memory.

16. A system, comprising:
means for routing near-field communications; and
means for maintaining a counter value in a plurality of pages of a non-volatile memory by:
storing an initial counter value in a page of the plurality of pages;
for each update of the stored initial counter value, storing an update value and an opcode associated with the update value in the page of the plurality of pages; and
determining a current counter value based on the stored initial value, stored update values and stored opcodes.

17. The system of claim 16 wherein when the page is full, the means for maintaining the counter value:
calculates the current counter value; and
stores the calculated current counter value as an initial counter value in another page of the plurality of pages.

18. The system of claim 16 wherein the means for maintaining the counter value selectively initializes the plurality of pages to a first state.

19. A non-transitory computer-readable medium whose contents cause a counter to perform a method, the method comprising:
storing an initial counter value in a first page of a plurality of pages of a non-volatile memory;
updating the stored initial counter value one or more times by, for each update, storing an update value and an opcode associated with the update value in the first page of the plurality of pages of the non-volatile memory; and
when the first page is full,
calculating a current counter value based on the stored initial counter value, the stored update values and the stored opcodes; and
storing the calculated current counter value as an initial counter value in a second page of the plurality of pages.

20. The non-transitory computer-readable medium of claim 19 wherein the method comprises selecting the opcodes from a set of opcodes including at least one of an addition opcode and a subtraction opcode.

21. The non-transitory computer-readable medium of claim 19 wherein the non-volatile memory is a flash memory of a near-field communication device.

Assignees

• Proton World Int Nv

Inventors

• Van Keer Ronny
• Docquier Guillaume

Classifications

• G06F9/3001

  Arithmetic instructions · CPC title

• H03K23/56

  Reversible counters (H03K23/52 {and H03K23/548} take precedence) · CPC title

• G06F2212/7207

  management of metadata or control data · CPC title

• G06F12/0246 Primary

  in block erasable memory, e.g. flash memory · CPC title

• H03K21/403

  Arrangements for storing the counting state in case of power supply interruption · CPC title