Hardware acceleration wait time awareness in central processing units with multi-thread architectures

Patent metadata

Field	Value
Publication number	US-9870256-B2
Application number	US-201213572921-A
Country	US
Kind code	B2
Filing date	Aug 13, 2012
Priority date	Jul 29, 2011
Publication date	Jan 16, 2018
Grant date	Jan 16, 2018

Abstract

Provided is a hardware accelerator and method, central processing unit, and computing device. A hardware accelerating method includes, in response to a request for a new task issued by a hardware thread, accelerating processing of the new task and producing a processing result for the task. A predicting step predicts total waiting time of the new task for returning to a specified address associated with the hardware thread.

First claim

What is claimed is:

1. A hardware accelerating method, comprising:
in response to a request for a new task issued by a hardware thread, accelerating processing of the new task by a hardware accelerator and producing a processing result for the task; and
predicting total waiting time of the new task for returning to a specified address associated with the hardware thread based upon a sum of time required by the hardware accelerator to complete execution of the new task itself and time required by the hardware accelerator to complete those tasks that have not been completed therein when the new task is received; and
wherein the request issued by the hardware thread comprises an address of an inner register of the hardware thread to specify the specified address associated with the hardware thread to which the total waiting time of the new task will be returned.

2. The hardware accelerating method of claim 1 , wherein the step of predicting total waiting time of the new task for returning to a specified address associated with the hardware thread comprises:
in response to reception of the new task, evaluating task execution time for the new task based on a task model; and
storing time required to complete all tasks that have not yet been completed as an accumulation result, accumulating the evaluated task execution time to the stored accumulation result for notifying the hardware thread of the newly accumulated result as the total waiting time of the new task, and subtracting the corresponding execution time from the stored accumulation result after the completion of a task.

3. The hardware accelerating method of claim 1 , wherein the step of predicting total waiting time of the new task for returning to a specified address associated with the hardware thread comprises:
evaluating task execution time for the new task based on a task model; and
storing the time required to complete all tasks that have not yet been completed as an accumulation result, in response to reception of the new task, appending a field of evaluated task execution time for the new task before putting it into a queue, accumulating the task execution time within the task execution time field to the stored accumulation result so as to notify the hardware thread of the newly accumulated result as the total waiting time of the new task, and subtracting a task execution time within a corresponding task execution time field from the stored accumulation result stored after the completion of a task.

4. The hardware accelerating method of claim 1 , wherein the step of predicting a total waiting time of the new task for returning to a specified address associated with the hardware thread comprises:
detecting the new task imported into a queue;
in response to the detection of the new task imported into the queue, evaluating task execution time for the new task based on a task model; and
storing time required to complete all tasks that have not yet been completed as an accumulation result, based on the evaluated task execution time, appending a field of task execution time for the new task to the new task, accumulating the task execution time within the task execution time field to the stored accumulation result so as to notify the hardware thread of the newly accumulated result as the total waiting time of the new task, and subtracting the task execution time within a corresponding task execution time field from the stored accumulation result after the completion of a task.

5. The hardware accelerating method of claim 1 , wherein the task execution time is evaluated for the new task based on one or more of the following items: processing frequency, input data size, and average cache hit ratio.

6. The hardware accelerating method of claim 1 , wherein the actual execution time of the new task is used to adjust the task model after the completion of the new task.

7. The hardware accelerating method of claim 1 , further comprising storing the total waiting time of the new task at a register of the hardware thread.

8. The hardware accelerating method of claim 1 , wherein accelerating processing of the new task and producing the processing result for the task includes offloading and executing the new task to the hardware accelerator, the hardware accelerator shared by multiple hardware threads, the hardware accelerator including a processing speed higher than that of the hardware threads.

Assignees

• Hou Rui
• Ge Yi
• Wang Kun
• Zhu Zhen Bo
• IBM

Inventors

• Hou Rui
• Ge Yi
• Wang Kun
• Zhu Zhen Bo

Classifications

• G06F9/4843 Primary

  by program, e.g. task dispatcher, supervisor, operating system · CPC title

• G06F9/54

  Interprogram communication · CPC title

• G06F2209/509

  Offload · CPC title