Dynamic clustering of touch sensor electrodes

US9870104B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9870104-B2
Application numberUS-201313955352-A
CountryUS
Kind codeB2
Filing dateJul 31, 2013
Priority dateJul 31, 2013
Publication dateJan 16, 2018
Grant dateJan 16, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In one embodiment, an apparatus includes a sensor having a plurality of electrodes and a controller having a processor and a memory. The memory includes logic operable, when executed by the processor, to connect each electrode of a first subset of the plurality of electrodes, apply voltage to the first subset, and determine a first value associated with a capacitance of the first subset. Based at least on the first value, the logic is further operable to connect each electrode of a second subset of the plurality of electrodes, the second subset having fewer electrodes than the first subset, apply voltage to the second subset, and determine a second value associated with a capacitance of the second subset.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a sensor comprising a plurality of electrodes; a controller comprising: a processor; and a memory comprising logic operable, when executed by the processor, to: connect each electrode of a first subset of the plurality of electrodes; apply voltage to the first subset after connecting each electrode of the first subset; determine a first value associated with a capacitance of the first subset after applying voltage to the first subset; determine, based at least on the first value, whether to alter the first subset of the plurality of electrodes to a second subset of the plurality of electrodes; connect, in response to determining to alter the first subset of the plurality of electrodes to the second subset of the plurality of electrodes, each electrode of the second subset of the plurality of electrodes, the second subset having fewer electrodes than the first subset; apply voltage to the second subset after connecting each electrode of the second subset; and determine a second value associated with a capacitance of the second subset after applying voltage to the second subset. 2. The apparatus of claim 1 , wherein the logic is further operable, when executed by the processor, to: based at least on the second value, connect a third subset of the plurality of electrodes, the third subset having fewer electrodes than the second subset; apply voltage to the third subset after connecting each electrode of the third subset; and determine a third value associated with a capacitance of the third subset after applying voltage to the third subset. 3. The apparatus of claim 1 , wherein: determining the first value comprises measuring a first voltage associated with the first subset after the application of voltage to the first subset; and determining the second value comprises measuring a second voltage associated with the second subset after the application of voltage to the second subset. 4. The apparatus of claim 1 , wherein the determination of the first and second values utilizes self-capacitance measurements. 5. The apparatus of claim 1 , wherein the first subset comprises a first electrode and a second electrode adjacent and substantially parallel to the first electrode. 6. The apparatus of claim 1 , wherein: the logic is further operable, when executed by the processor, to: connect each electrode of a third subset of the plurality of electrodes, the third subset having the same number of electrodes as the first subset; apply voltage to the third subset after connecting each electrode of the third subset; and determine a third value associated with a capacitance of the third subset after applying voltage to the third subset; and the connection of each electrode of a second subset is based at least on the first and third values. 7. The apparatus of claim 1 , wherein the first subset includes one or more electrodes that are not included in the second subset and includes one or more electrodes that are included in the second subset. 8. A method comprising: connecting each electrode of a first subset of a plurality of electrodes of a sensor; applying voltage to the first subset after connecting each electrode of the first subset; determining a first value associated with a capacitance of the first subset after applying voltage to the first subset; determining, based at least on the first value, to alter the first subset of the plurality of electrodes to a second subset of the plurality of electrodes; connecting, in response to determining to alter the first subset of the plurality of electrodes to the second subset of the plurality of electrodes, each electrode of the second subset of the plurality of electrodes, the second subset having fewer electrodes than the first subset; applying voltage to the second subset after connecting each electrode of the second subset; and determining a second value associated with a capacitance of the second subset after applying voltage to the second subset. 9. The method of claim 8 , further comprising: based at least on the second value, connecting each electrode of a third subset of the plurality of electrodes, the third subset having fewer electrodes than the second subset; applying voltage to the third subset after connecting each electrode of the third subset; and determining a third value associated with a capacitance of the third subset after applying voltage to the third subset. 10. The method of claim 8 , wherein: determining the first value comprises measuring a first voltage associated with the first subset after the application of voltage to the first subset; and determining the second value comprises measuring a second voltage associated with the second subset after the application of voltage to the second subset. 11. The method of claim 8 , wherein the determination of the first and second values utilizes self-capacitance measurements. 12. The method of claim 8 , further comprising: connecting each electrode of a third subset of the plurality of electrodes, the third subset having the same number of electrodes as the first subset; applying voltage to the third subset after connecting each electrode of the third subset; and determining a third value associated with a capacitance of the third subset after applying voltage to the third subset; wherein the connection of each electrode of a second subset is based at least on the first and third values. 13. The method of claim 8 , wherein the application of voltage to the first and third subsets is substantially simultaneous. 14. An apparatus comprising: one or more processors; and a non-transitory computer-readable storage medium comprising logic, the logic configured to, when executed by the one or more processors, cause the one or more processors to perform operations comprising: connecting each electrode of a first subset of a plurality of electrodes; applying voltage to the first subset after connecting each electrode of the first subset; determining a first value associated with a capacitance of the first subset after applying voltage to the first subset; determining, based at least on the first value, whether to alter the first subset of the plurality of electrodes to a second subset of the plurality of electrodes; connecting, in response to determining to alter the first subset of the plurality of electrodes to the second subset of the plurality of electrodes, each electrode of the second subset of the plurality of electrodes, wherein the second subset includes one or more electrodes included in the first subset, includes one or more electrodes not included in the first subset, and does not include one or more electrodes included in the first subset; applying voltage to the second subset after connecting each electrode of the second subset; determining a second value associated with a capacitance of the second subset after applying voltage to the second subset; and determining a position of an object based at least on the first and second values, the position indicating a projection of a portion of the object over a surface of the sensor. 15. The apparatus of claim 14 , wherein the operations further comprise: connecting each electrode of a third subset of the plurality of electrodes, wherein the third subset includes one or more electrodes included in the first and second subsets, includes one or more electrodes not included in the first and second subsets, and does not include one or more electrodes included in the first and second subsets; applying voltage to the third subset after connecting each

Assignees

Inventors

Classifications

  • 2.5D-digitiser, i.e. digitiser detecting the X/Y position of the input means, finger or stylus, also when it does not touch, but is proximate to the digitiser's interaction surface and also measures the distance of the input means within a short range in the Z direction, possibly with a separate measurement setup · CPC title

  • G06F3/0418Primary

    for error correction or compensation, e.g. based on parallax, calibration or alignment · CPC title

  • G06F3/044Primary

    by capacitive means · CPC title

  • Touchless 2D- digitiser, i.e. digitiser detecting the X/Y position of the input means, finger or stylus, also when it does not touch, but is proximate to the digitiser's interaction surface without distance measurement in the Z direction · CPC title

  • Control or interface arrangements specially adapted for digitisers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9870104B2 cover?
In one embodiment, an apparatus includes a sensor having a plurality of electrodes and a controller having a processor and a memory. The memory includes logic operable, when executed by the processor, to connect each electrode of a first subset of the plurality of electrodes, apply voltage to the first subset, and determine a first value associated with a capacitance of the first subset. Based …
Who is the assignee on this patent?
Brunet Samuel, Collins Richard Paul, Hristov Luben, and 4 more
What technology area does this patent fall under?
Primary CPC classification G06F3/0418. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 16 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).