Semiconductor memory card, printed circuit board for memory card and method of fabricating the same

US9867288B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9867288-B2
Application numberUS-201314386637-A
CountryUS
Kind codeB2
Filing dateMar 20, 2013
Priority dateMar 20, 2012
Publication dateJan 9, 2018
Grant dateJan 9, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board for a memory card includes an insulating layer; a mounting part on a first surface of the insulating layer, the mounting part being electrically connected to a memory device; and a terminal part on a second surface of the insulating layer, the terminal part being electrically connected to an external electronic appliance, wherein a same metal layer having a same property is formed on exposed surfaces of the mounting part and the terminal part.

First claim

Opening claim text (preview).

The invention claimed is: 1. A printed circuit board for a memory card, the printed circuit board comprising: an insulating layer; a mounting part on a first surface of the insulating layer, the mounting part being electrically connected to a memory device through a wire; a terminal part on a second surface of the insulating layer, the terminal part being electrically connected to an external electronic appliance; a first metal layer on the mounting part; and a second metal layer on the terminal part, wherein a bonding property, a glossiness and a wear resistance of the first metal layer are same as a bonding property, a glossiness and a wear resistance of the second metal layer, wherein each of the first metal layer and the second metal layer comprises: a nickel metal layer formed on the mounting part and formed of nickel; a palladium metal layer formed on the nickel metal layer and formed of palladium; and a gold metal layer formed on the palladium metal layer, wherein the gold metal layer has a thickness in a range of 0.1 μm to 0.2 μm, wherein the nickel metal layer has a glossiness of 1.8 or more, wherein the nickel metal layer includes: a first part disposed on top surfaces of the mounting part and the terminal part, and having a first thickness; and a second part disposed on side surface of the mounting part and the terminal part, and having a second thickness, wherein a ratio of the first thickness to the second thickness is lower than 1.07, and greater than 1.0 wherein the gold metal layer comprises a gold alloy layer comprising gold and at least one of silver, copper, palladium, zinc, cobalt and an inorganic material, and wherein the palladium metal layer comprises a palladium alloy layer comprising palladium and at least one of cobalt, zinc and an inorganic material. 2. The printed circuit board of claim 1 , wherein the nickel metal layer has a thickness in a range of 5 μm to 8 μm, and the palladium metal layer has a thickness in a range of in a range of 0.1 μm to 0.2 μm. 3. A memory card comprising: a printed circuit board comprising an insulating layer; a memory device mounted on a predetermined region of a first surface of the printed circuit board; a first pattern electrically connected to the memory device through a wire; and a second pattern formed on a second surface of the printed circuit board and electrically connected to an external electronic appliance; a first metal layer on the first pattern; and a second metal layer on the second pattern, wherein a bonding property, a glossiness and a wear resistance of the first metal layer are same as a bonding property, a glossiness and a wear resistance of the second metal layer, wherein each of the first metal layer and the second metal layer comprises: a nickel metal layer on the first pattern and the second pattern; a palladium metal layer formed on the nickel metal layer and formed of palladium; and a gold metal layer formed on the palladium metal layer, wherein the nickel metal layer has a thickness in a range of 5 μm to 8 μm, wherein the palladium metal layer has a thickness in a range of in a range of 0.1 μm to 0.2 μm, wherein the gold metal layer has a thickness in a range of 0.1 μm to 0.2 μm, wherein the nickel metal layer has a glossiness of 1.8 or more, wherein the nickel metal layer includes: a first part disposed on top surfaces of the first pattern and the second pattern, and having a first thickness; and a second part disposed on side surface of the first pattern and the second pattern, and having a second thickness, wherein a ratio of the first thickness to the second thickness is lower than 1.07, and greater than 1.0 wherein the gold metal layer comprises a gold alloy layer comprising gold and at least one of silver, copper, palladium, zinc, cobalt and an inorganic material, and wherein the palladium metal layer comprises a palladium alloy layer comprising palladium and at least one of cobalt, zinc and an inorganic material.

Assignees

Inventors

Classifications

  • comprising gold [Au] · CPC title

  • associated with surface mounted components · CPC title

  • Finish plating of conductors, especially of copper conductors, e.g. for pads or lands (selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3465) · CPC title

  • using masking means · CPC title

  • Memory · CPC title

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Frequently asked questions

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What does patent US9867288B2 cover?
A printed circuit board for a memory card includes an insulating layer; a mounting part on a first surface of the insulating layer, the mounting part being electrically connected to a memory device; and a terminal part on a second surface of the insulating layer, the terminal part being electrically connected to an external electronic appliance, wherein a same metal layer having a same property…
Who is the assignee on this patent?
Lg Innotek Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K1/05. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 09 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).