Quasi-differential RF power amplifier with high level of harmonics rejection

Patent metadata

Field	Value
Publication number	US-9866196-B2
Application number	US-201414539032-A
Country	US
Kind code	B2
Filing date	Nov 12, 2014
Priority date	Nov 13, 2013
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.

First claim

What is claimed is:

1. A quasi-differential amplifier, comprising:
an input port;
an output port;
a phase shifter network having a first port connected to the input port, a second port, and a third port;
a first amplifier having an input connected to the second port of the phase shifter network, and an output;
a second amplifier having an input connected to the third port of the phase shifter network, and an output;
a balun circuit including a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, a single-ended port, a first pair of first and second coupled inductors with the first coupled inductor being electrically connected to the first differential port and the single-ended port, the second coupled inductor being electrically connected to the second differential port, a first capacitor electrically connected between the first coupled inductor and the single ended port, and to the second coupled inductor and the second differential port, a second capacitor electrically connected to the second coupled inductor, and a grounded inductor electrically coupled in series to the second capacitor;
a compensation network connected to the output of the second amplifier and the second differential port of the balun circuit; and
an output matching network connected to the single-ended port of the balun circuit and to the output port.

2. The quasi-different amplifier of claim 1 wherein a differential signal fed to the first differential port and the second differential port from the respective one of the first amplifier and the second amplifier are converted to a single signal output from the single-ended port, and a common output impedance of the single-ended port is transformed from an input impedance of the first and second differential ports.

3. The quasi-differential amplifier of claim 1 further comprising a first amplifier interconnection inductor connected to the output of the first amplifier and the first differential port of the balun circuit.

4. The quasi-differential amplifier of claim 3 wherein the first amplifier interconnection inductor is an interconnect trace.

5. The quasi-differential amplifier of claim 1 further comprising a second amplifier interconnection inductor connected to the output of the second amplifier and the compensation network.

6. The quasi-differential amplifier of claim 1 wherein the compensation network is tuned to reject third harmonic signal components.

7. The quasi-differential amplifier of claim 1 wherein the output matching network transforms an output impedance from an initial predefined value to a final predefined value.

8. The quasi-differential amplifier of claim 7 wherein the final predefined value of the output impedance is fifty (50) ohm.

9. The quasi-differential amplifier of claim 1 wherein the output matching network is tuned to reject second harmonic signal components.

10. The quasi-differential amplifier of claim 9 wherein the output matching network includes a first network segment tuned to reject the second harmonic signal components, and a second network segment tuned to reject fourth harmonic signal components.

11. The quasi-differential amplifier of claim 1 further comprising a harmonic rejection component connected to the first differential port of the balun circuit and the second differential port of the balun circuit.

12. The quasi-differential amplifier of claim 1 further comprising a first common bias supply connected to the first amplifier and the second amplifier.

13. The quasi-differential amplifier of claim 12 wherein the first common bias supply includes a voltage source connected to a pair of coupled inductors, a first one of the coupled inductors being connected to the first amplifier, and a second one of the coupled inductors being connected to the second amplifier.

14. The quasi-differential amplifier of claim 1 further comprising a second common bias supply connected to the first amplifier and the second amplifier.

15. The quasi-differential amplifier of claim 14 wherein the second common bias supply includes a control signal source connected to a pair of coupled inductors, a first one of the coupled inductors being connected to the first amplifier, and a second one of the coupled inductors being connected to the second amplifier.

16. The quasi-differential amplifier of claim 15 further comprising a matching capacitor connected to the first one of the coupled inductors and the second one of the coupled inductors.

17. The quasi-differential amplifier of claim 1 wherein the first amplifier and the second amplifier each include a bipolar junction transistor having a base, a collector, and an emitter.

18. The quasi-differential amplifier of claim 1 wherein the first amplifier and the second amplifier each include a field effect transistor having a gate, a source, and a drain.

19. The quasi-differential amplifier of claim 1 wherein either one or both of the first amplifier and the second amplifier have a cascode configuration.

20. The quasi-differential amplifier of claim 1 wherein the phase shifter network includes a splitter with a common terminal connected to the first port of the phase shifter network, a first split terminal connected to the second port of the phase shifter network, and a second split terminal.

21. The quasi-differential amplifier of claim 20 wherein the phase shifter network further includes a shifter having a first terminal connected to the second split terminal of the splitter, and a second terminal connected to the third port of the phase shifter network.

22. The quasi-differential amplifier of claim 2 wherein phases of voltage components and current components of the differential signal are tuned to a predefined minimum.

23. The quasi-differential amplifier of claim 22 wherein the predefined minimum is less than five degrees.

24. The quasi-differential amplifier of claim 2 wherein a total power level delivered to the first and second differential ports are within a predefined percentage of each other.

25. The quasi-differential amplifier of claim 24 wherein the predefined percentage is less than ten percent.

26. A quasi-differential amplifier, comprising:
an input port;
an output port;
a phase shifter network having a first port connected to the input port, a second port, and a third port;
a first amplifier having an input connected to the second port of the phase shifter network, and an output;
a second amplifier having an input connected to the third port of the phase shifter network, and an output;
a balun circuit including a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, a single-ended port, a first pair of first and second coupled inductors with the first coupled inductor being electrically connected to the first differential port and the single-ended port, the second coupled inductor being electrically connected to the second differential port, a first capacitor electrically connected between the first coupled inductor and the single ended port, and to the second coupled inductor and the second differential port, a second capacitor electrically connected to the second coupled inductor, and a grounded inductor electrically coupled in series to the second capacitor; and
an output matching networ

Assignees

• Skyworks Solutions Inc

Inventors

• Gorbachov Oleksandr

Classifications

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03H7/42 Primary

  Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns · CPC title

• H03F3/195

  in integrated circuits · CPC title

• H03F3/191

  Tuned amplifiers (H03F3/193, H03F3/195 take precedence) · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title