Dead-time compensation in a power supply system

Patent metadata

Field	Value
Publication number	US-9866118-B2
Application number	US-201615076863-A
Country	US
Kind code	B2
Filing date	Mar 22, 2016
Priority date	Jan 30, 2012
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

One embodiment includes a power supply system. The system includes a pulse-width modulation (PWM) system configured to generate a PWM signal. The system also includes a power stage comprising a gate driver, a high-side switch, and a low-side switch. The gate driver can be configured to alternately activate the high-side and low-side switches to provide an output signal to a load in response to the PWM signal, and to provide an activation dead-time between the alternate activation of the high-side and low-side switches. The system further includes a digital delay system configured to measure the activation dead-time and to add the measured activation dead-time to the activation of the high-side switch.

First claim

What is claimed is:

1. A method, comprising:
generating a pulse-width modulation (PWM) signal including a first PWM pulse during a first time period and a second PWM pulse during a second time period after the first time period, the first PWM pulse having a first PWM pulse width, the second PWM pulse having a second PWM pulse width;
generating an activation signal corresponding to the first PWM pulse during the first time period;
generating an output signal based on the activation signal;
measuring an activation dead-time by comparing the first PWM pulse with the output signal during the first time period;
generating a control signal having an adjusted pulse width based on the second PWM pulse width and the measured activation dead-time; and
prolonging the activation signal during the second time period based on the control signal.

2. The method of claim 1 , wherein the measuring the activation dead-time includes counting a time lapse between an input rising edge of the first PWM pulse and an output rising edge of the output signal during the first time period.

3. The method of claim 1 , wherein:
the generating the activation signal includes generating the activation signal based on a control rising edge of the control signal; and
the generating the output signal includes switching the output signal from a low voltage to a high voltage based on the activation signal.

4. The method of claim 3 , further comprising:
generating a second activation signal based on a control falling edge of the control signal,
wherein the generating the output signal includes switching the output signal from the high voltage to the low voltage based on the second activation signal.

5. The method of claim 1 , wherein:
the generating the activation signal includes generating the activation signal based on a control rising edge of the control signal; and
the generating the output signal includes switching the output signal from a high voltage to a low voltage based on the activation signal.

6. The method of claim 5 , further comprising:
generating a second activation signal based on a control falling edge of the control signal,
wherein the generating the output signal includes switching the output signal from the low voltage to the high voltage based on the second activation signal.

7. The method of claim 1 , wherein:
the measuring the activation dead-time includes counting a number of time intervals between an input rising edge of the first PWM pulse and an output rising edge of the output signal; and
the generating the control signal includes generating the adjusted pulse width by adding the measured activation dead-time to the second PWM pulse width.

8. The method of claim 1 , wherein the generating the control signal includes:
generating a reset signal based on a NOR operation of the PWM signal and a delay signal associated with the measured activation dead-time; and
generating the control signal by an SR latch receiving the PWM signal to a set input and receiving the reset signal to a reset input.

9. The method of claim 1 , wherein:
the PWM signal includes a third PWM pulse during a third time period after the second time period, the third PWM pulse having a third PWM pulse width;
the measuring the activation dead-time includes:
measuring a first dead-time by counting a first number of time intervals between an input rising edge of the first PWM pulse and a first output rising edge of the output signal during the first time period; and
measuring a second dead-time by counting a second number of time intervals between an input rising edge of the second PWM pulse and a second output rising edge of the output signal during the second time period; and

the generating the control signal includes:
generating a first adjusted pulse width by adding the first measured dead-time to the second PWM pulse width during the second time period; and
generating a second adjusted pulse width by adding the second measured dead-time to the third PWM pulse width during the third time period.

10. A method, comprising:
generating a pulse-width modulation (PWM) signal including a first PWM pulse during a first time period and a second PWM pulse during a second time period after the first time period, the first PWM pulse having a first PWM pulse width, the second PWM pulse having a second PWM pulse width;
measuring an activation dead-time between the first PWM pulse and an output signal during the first time period; and
generating a control signal having an adjusted pulse width extending from the second PWM pulse width by the measured activation dead-time, the control signal prolonging an activation signal for switching the output signal during the second time period.

11. The method of claim 10 , wherein the measuring the activation dead-time includes counting a time lapse between an input rising edge of the first PWM pulse and an output rising edge of the output signal during the first time period.

12. The method of claim 10 , further comprising:
generating the activation signal based on a control rising edge of the control signal; and
switching the output signal from a low voltage to a high voltage based on the activation signal.

13. The method of claim 12 , further comprising:
generating a second activation signal based on a control falling edge of the control signal,
switching the output signal from the high voltage to the low voltage based on the second activation signal.

14. The method of claim 10 , further comprising:
generating the activation signal based on a control rising edge of the control signal; and
switching the output signal from a high voltage to a low voltage based on the activation signal.

15. The method of claim 14 , further comprising:
generating a second activation signal based on a control falling edge of the control signal,
switching the output signal from the low voltage to the high voltage based on the second activation signal.

16. The method of claim 10 , wherein:
the PWM signal includes a third PWM pulse during a third time period after the second time period, the third PWM pulse having a third PWM pulse width;
the measuring the activation dead-time includes:
measuring a first dead-time by counting a first number of time intervals between an input rising edge of the first PWM pulse and a first output rising edge of the output signal during the first time period; and
measuring a second dead-time by counting a second number of time intervals between an input rising edge of the second PWM pulse and a second output rising edge of the output signal during the second time period; and

the generating the control signal includes:
generating a first adjusted pulse width by adding the first measured dead-time to the second PWM pulse width during the second time period; and
generating a second adjusted pulse width by adding the second measured dead-time to the third PWM pulse width during the third time period.

17. A power supply system, comprising:
means for generating a pulse-width modulation (PWM) signal including a first PWM pulse during a first time period and a second PWM pulse during a second time period after the first time period, the first PWM pulse having a first PWM pulse width, the second PWM pulse having a second PWM pulse width;
means for measuring an activation dead-time between the first PWM pulse and an output signal during the first time period; and
means for generating a control signal having an adjusted pulse width extending from the second PWM pulse width by the measured activation dead-time, the control sign

Assignees

• Texas Instruments Inc

Inventors

• Shook Adam L

Classifications

• G05F1/10

  Regulating voltage or current  (G05F1/02 takes precedence) · CPC title

• H03K17/165

  by feedback from the output circuit to the control circuit · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H03K7/08

  Duration or width modulation {; Duty cycle modulation} · CPC title

• H02M2001/385

  Electricity · mapped topic