Packaging for an electronic device

Patent metadata

Field	Value
Publication number	US-9865807-B2
Application number	US-201514877309-A
Country	US
Kind code	B2
Filing date	Oct 7, 2015
Priority date	Mar 15, 2013
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.

First claim

What is claimed is:

1. A method comprising:
processing a metal substrate;
performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads of a lead frame and a curved component of the lead frame having two primary leads, each primary lead located at a respective end of the curved component and being substantially flat;
performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to form recessed portions, at least one of the secondary leads comprising a first recessed portion at a first end of the secondary lead and a first outside portion being substantially flat, the first outside portion comprising corners at a second end of the secondary lead, opposite the first end, configured to contribute to solder wicking, the curved component comprising a second recessed portion;
attaching a die to the lead frame; and
overmolding the die and a portion of the lead frame to form a housing, wherein at least one surface of a secondary lead forms a bottom surface of the package, wherein at least one surface of the curved component forms the bottom surface of the package, the housing and the second recessed portion of the curved component forming a locking mechanism, the first outside portion of the at least one of the secondary leads extending away from the housing, the two primary leads extending away from the housing.

2. The method of claim 1 , wherein the first etch and the second etch are performed concurrently.

3. The method of claim 1 , wherein processing the metal substrate comprises performing photolithography on the metal substrate.

4. The method of claim 1 , wherein performing the second etch comprises performing the second etch to a depth of between 40% and 60% of a depth of the first etch.

5. The method of claim 4 , wherein performing the second etch comprises performing the second etch to a depth of about 50% of the depth of the first etch.

6. The method of claim 1 , further comprising trimming a lead at one of the location of the second etch.

7. The method of claim 1 , wherein forming the curved component comprises forming a semi-circle component.

8. The method of claim 1 , further comprising attaching the curved component and the secondary leads to the die.

9. The method of claim 8 , wherein attaching the curved component and the secondary leads to the die comprises attaching the curved component and the secondary leads to a die comprising at least two Hall elements.

10. The method of claim 9 , wherein attaching the curved component to the die comprises attaching the curved component to the die with the curved component wrapped at least partially around one of the at least two Hall elements.

Assignees

• Allegro Microsystems Llc

Inventors

• Liu Shixi Louis
• Wong Harianto
• David Paul A
• Sauber John B
• Milano Shaun D
• Kanda Raguvir
• Hemenway Bruce

Classifications

• G01R33/09

  Magnetoresistive devices · CPC title

• G01R33/0052

  Manufacturing aspects; Manufacturing of single devices, i.e. of semiconductor magnetic sensor chips (devices based on galvano-magnetic effect or the like H10N50/85) · CPC title

• G01R15/207 Primary

  Constructional details independent of the type of device used · CPC title

• G01R15/202

  using Hall-effect devices (Hall elements in arrangements for measuring electrical power G01R21/08) · CPC title

• H10W90/726

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title