Circuit and method for eliminating shutdown after-image, and display device

Patent metadata

Field	Value
Publication number	US-9865204-B2
Application number	US-201314362071-A
Country	US
Kind code	B2
Filing date	Sep 13, 2013
Priority date	Jul 23, 2013
Publication date	Jan 9, 2018
Grant date	Jan 9, 2018

Abstract

The present invention relates to the field of display technology, and provides a circuit and a method for eliminating a shutdown after-image, and a display device. The circuit for eliminating the shutdown after-image in a liquid crystal panel comprises a control module configured to apply a common voltage of a liquid crystal panel to a gate line of the liquid crystal panel under the control of a shutdown signal when the liquid crystal panel is shut down. According to the present invention, it is able to eliminate the shutdown after-image and prevent the occurrence of large shutdown current.

First claim

What is claimed is:

1. A circuit for eliminating a shutdown after-image, comprising:
a control module, configured to apply a common voltage of a liquid crystal panel to a gate line of the liquid crystal panel under control of a shutdown signal when the liquid crystal panel is shut down;
wherein the control module comprises:
a first switch unit, configured to output a multi-level gate voltage MLG to the gate line during operation of the liquid crystal panel; and
a second switch unit, configured to output the common voltage to the gate line when the liquid crystal panel is shut down; and
a third switch unit, configured to supply power to a gate driving circuit by using the common voltage when the liquid crystal panel is shut down;
wherein the first switch unit is an N-type MOSFET, a gate electrode of the first switch unit is configured to receive the shutdown signal, a source electrode of the first switch unit is coupled to an MLG output end, and a drain electrode of the first switch unit is coupled to a voltage input end of the gate line;
wherein the second switch unit is a P-type MOSFET, a gate electrode of the second switch unit is configured to receive the shutdown signal, a source electrode of the second switch unit is coupled to a common voltage output end, and a drain electrode of the second switch unit is coupled to a voltage input end of the gate line; and
wherein the third switch unit is a P-type MOSFET, a gate electrode of the third switch unit is configured to receive the shutdown signal, the gate electrode of the third switch unit is coupled to the gate electrode of the first switch unit and the gate electrode of the second switch unit, a source electrode of the third switch unit is coupled to the common voltage output end, and a drain electrode of the third switch unit is coupled to a power voltage input end of the gate driving circuit.

2. The circuit according to claim 1 , wherein the control module is arranged in a power IC or the gate driving circuit.

3. The circuit according to claim 2 , wherein when the control module is arranged in the gate driving circuit, the control module further comprises:
a connection line arranged between the first switch unit and an MLG output end in the power IC;
a connection line arranged between the second switch unit and a common voltage output end in the power IC; and
a connection line arranged between the third switch unit and the common voltage output end in the power IC.

4. A display device comprising the circuit for eliminating a shutdown after-image according to claim 1 .

5. A method for eliminating a shutdown after-image, comprising:
applying a common voltage of a liquid crystal panel to a gate line of the liquid crystal panel under control of a shutdown signal when the liquid crystal panel is shut down;
outputting a multi-level gate voltage MLG to the gate line during operation of the liquid crystal panel; and
outputting the common voltage to the gate line when the liquid crystal panel is shut down;
wherein an N-type MOSFET is arranged to output the MLG to the gate line during the operation of the liquid crystal panel, a gate electrode of the N-type MOSFET is configured to receive the shutdown signal, a source electrode of the N-type MOSFET is coupled to an MLG output end, and a drain electrode of the N-type MOSFET is coupled to a voltage input end of the gate line;
wherein a first P-type MOSFET is arranged to output the common voltage to the gate line when the liquid crystal panel is shut down, a gate electrode of the first P-type MOSFET is configured to receive the shutdown signal, a source electrode of the first P-type MOSFET is coupled to a common voltage output end, and a drain electrode of the first P-type MOSFET is coupled to a voltage input end of the gate line; and
wherein a second P-type MOSFET is arranged to supply power to the gate driving circuit by using the common voltage when the liquid crystal panel is shut down, a gate electrode of the second P-type MOSFET is configured to receive the shutdown signal, the gate electrode of the second P-type MOSFET is coupled to the gate electrode of the N-type MOSFET and the gate electrode of the first P-type MOSFET, a source electrode of the second P-type MOSFET is coupled to the common voltage output end, and a drain electrode of the second P-type MOSFET is coupled to a power voltage input end of the gate driving circuit.

6. The method according to claim 5 , wherein the step of applying the common voltage of the liquid crystal panel to the gate line of the liquid crystal panel under the control of the shutdown signal when the liquid crystal panel is shut down further comprises:
supplying power to a gate driving circuit by using the common voltage when the liquid crystal panel is shut down.

Assignees

• Boe Technology Group Co Ltd
• Hefei Boe Optoelectronics Tech
• Hefei Boe Optoelectronics Tech Ltd

Inventors

• Liu rongcheng
• Zhang Douqing
• Liang Hengzhen

Classifications

• G09G3/3677 Primary

  suitable for active matrices only · CPC title

• G09G2330/025

  Reduction of instantaneous peaks of current · CPC title

• G09G2330/027

  Arrangements or methods related to powering off a display · CPC title

• G09G2310/063

  Waveforms for resetting the whole screen at once · CPC title

• G09G3/3611 Primary

  Control of matrices with row and column drivers · CPC title