Adaptive operation of 3D NAND memory
US-9401216-B1 · Jul 26, 2016 · US
US9864682B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9864682-B2 |
| Application number | US-201514664125-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 20, 2015 |
| Priority date | Mar 21, 2014 |
| Publication date | Jan 9, 2018 |
| Grant date | Jan 9, 2018 |
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According to example embodiments, a method of operating a storage device includes reading a process capability index using a memory controller, adjusting at least one operation condition based on the process capability index, and operating one of at least one nonvolatile memory device according to the at least one operation condition adjusted. The process capability index indicates how a structure associated with a memory cell to be operated deviates from a target shape.
Opening claim text (preview).
What is claimed is: 1. A nonvolatile memory device comprising: a memory cell array including a plurality of strings spaced apart from each other on a substrate, each string including a plurality of memory cells stacked on each other between a ground select transistor and a string select transistor; an address decoder connected to the strings through a plurality of word lines, each word line being connected to at least two of the memory cells at a same height of at least two of t…
Physics · mapped topic
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