Magnetic memory device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9859488-B2
Application number	US-201715466802-A
Country	US
Kind code	B2
Filing date	Mar 22, 2017
Priority date	Nov 10, 2014
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

A magnetic memory device includes a reference magnetic pattern having a magnetization direction fixed in one direction, a free magnetic pattern having a changeable magnetization direction, and a tunnel barrier pattern disposed between the free and reference magnetic patterns. The free magnetic pattern has a first surface being in contact with the tunnel barrier pattern and a second surface opposite to the first surface. The magnetic memory device further includes a sub-oxide pattern disposed on the second surface of the free magnetic pattern, and a metal boride pattern disposed between the sub-oxide pattern and the second surface of the free magnetic pattern. The magnetization directions of the free and reference magnetic patterns are substantially perpendicular to the first surface of the free magnetic pattern.

First claim

What is claimed is:

1. A memory device, comprising:
a reference magnetic pattern having a magnetization direction fixed in one direction;
a free magnetic pattern having a changeable magnetization direction;
a tunnel barrier pattern disposed between the free magnetic pattern and the reference magnetic pattern, the free magnetic pattern having a first surface contacting the tunnel barrier pattern and a second surface opposite to the first surface; and
a structure on the second surface of the free magnetic pattern, the structure including tantalum, boron, and oxygen,
wherein the changeable magnetization direction of the free magnetic pattern and the magnetization direction of the reference magnetic pattern are substantially perpendicular to the first surface of the free magnetic pattern.

2. The memory device of claim 1 , wherein the structure has a boron concentration other than a boron concentration of the free magnetic pattern.

3. The memory device of claim 1 , wherein the structure includes a first portion and a second portion, the second portion being disposed between the first portion and the free magnetic pattern.

4. The memory device of claim 3 , wherein the second portion has a boron concentration higher than a boron concentration of the first portion.

5. The memory device of claim 3 , wherein the second portion includes the tantalum, the boron, and the oxygen.

6. The memory device of claim 3 , wherein the first portion includes the tantalum, and the oxygen.

7. The memory device of claim 3 , wherein a boron concentration of the second portion is higher than a boron concentration of the free magnetic pattern.

8. The memory device of claim 3 , wherein the free magnetic pattern includes a crystalline portion and an amorphous portion,
wherein a boron concentration of the amorphous portion is higher than a boron concentration of the crystalline portion.

9. The memory device of claim 8 , wherein a boron concentration of the second portion is higher than the boron concentration of the amorphous portion.

10. The memory device of claim 8 , wherein the amorphous portion is adjacent to the structure and the crystalline portion is adjacent to the tunnel barrier pattern.

11. The memory device of claim 8 , wherein the boron concentration of the crystalline portion is lower than 10 at %.

12. The memory device of claim 1 ,
wherein a thickness of the structure is in a range of about 1 Å to about 40 Å.

13. The memory device of claim 1 , wherein the reference magnetic pattern, the tunnel barrier pattern, the free magnetic pattern, and the structure are sequentially stacked on a substrate.

14. A method of manufacturing a memory device, the method comprising:
sequentially forming a reference magnetic layer, a tunnel barrier layer, and a free magnetic layer on a substrate;
forming a tantalum layer on the free magnetic layer;
performing an annealing process on the tantalum layer; and
performing an oxidizing process on the tantalum layer after the annealing process.

15. The method of claim 14 , wherein the free magnetic layer includes at least one magnetic element, and
wherein a boride-formation energy of the tantalum layer is lower than a boride-formation energy of the at least one magnetic element of the free magnetic layer.

16. The method of claim 14 , wherein boron atoms included in the free magnetic layer diffuse into a lower portion of the tantalum layer by the annealing process to form a tantalum boride layer.

17. The method of claim 16 , wherein a boron concentration of the tantalum boride layer is higher than a boron concentration of the free magnetic layer.

18. The method of claim 16 , wherein a remaining upper portion of the tantalum layer is oxidized by the oxidizing process to form a tantalum oxide layer.

19. A method of manufacturing a memory device, the method comprising:
sequentially forming a reference magnetic layer, a tunnel barrier layer, and a free magnetic layer on a substrate;
forming a tantalum boride layer on the free magnetic layer; and
forming a metal oxide layer on the tantalum boride layer.

20. The method of claim 19 , further comprising:
performing a thermal treatment process to diffuse oxygen atoms included in the metal oxide layer to an interface between the tantalum boride layer and the free magnetic layer.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Joonmyoung
• Kim Kwangseok
• Kim Ki Woong
• Kim Whankyun
• Park Sang Hwan

Classifications

• H01L43/08

  Electricity · mapped topic

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• H01L43/10

  Electricity · mapped topic

• H01L27/222

  Electricity · mapped topic

• H01L43/12

  Electricity · mapped topic