Heat isolation structures for high bandwidth interconnects

Patent metadata

Field	Value
Publication number	US-9859188-B2
Application number	US-201414902171-A
Country	US
Kind code	B2
Filing date	Jul 2, 2014
Priority date	Jul 3, 2013
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

A die interconnect system having a plurality of connection pads, a heat generating element thermally isolated from the die, one or more leads extending from the die to the heat generating element, each lead having a metal core with a core diameter, a dielectric layer surrounding the metal core with a dielectric thickness, and an outer metal layer attached to ground, wherein one or more leads are exposed to ambient conditions and/or are convectively or contact cooled for at least a portion of their length to minimize heat transfer from the heat generating element to the die.

First claim

Thus, having described the invention, what is claimed is:

1. A die interconnect system, comprising:
a die having a plurality of connection pads;
a heat generating element thermally isolated from the die;
more than one lead extending from the die to the heat generating element, each lead having a metal core with a core diameter, a dielectric layer surrounding the metal core with a dielectric thickness, the dielectric layer being covered with an outer metal layer attached to ground, wherein more than one lead is exposed to ambient conditions and/or is convectively or contact cooled for at least a portion of its length to minimize heat transfer from the heat generating element to the die;
wherein at least one lead is a ribbon lead extending from the die to the heat generating element.

2. The die interconnect system of claim 1 , wherein the heat generating element is a laser module.

3. The die interconnect system of claim 1 , wherein a low thermal transmissivity substrate section is interposed between the die and the heat generating element.

4. The die interconnect system of claim 3 , wherein the low thermal transmissivity substrate section includes inorganic materials, polymers, composite materials, or oriented materials.

5. The die interconnect system of claim 1 , including a non-metal outer conductive coating of at least one lead that includes oriented graphene or indium tin oxide.

6. The die interconnect system of claim 1 , including an active or passive thermal heat sink cooling the leads by moving air or liquid, high thermal conductivity metal or active cooling agents such as piezoelectric coolers.

7. The die interconnect system of claim 1 , wherein the die and the heat generating element are arranged on a common substrate.

8. The die interconnect system of claim 1 , including a sensor element, a thermal bolometer, a sensitive Charge Coupled Device (CCD), or Complementary Metal Oxide Semiconductor (CMOS) light detecting element.

9. The die interconnect system of claim 1 , including a die substrate having a filled via to allow formation of a Ball Grid Array (BGA) package.

10. The die interconnect system of claim 9 configured for a Ball Grid Array (BGA) package.

11. The die interconnect system of claim 2 , wherein a low thermal transmissivity substrate section is interposed between the die and the heat generating element.

12. The die interconnect system of claim 4 , wherein said composite material includes inorganic clay supported in polymers.

13. The die interconnect system of claim 4 , including a non-metal outer conductive coating of at least one lead that includes oriented graphene or indium tin oxide.

14. The die interconnect system of claim 13 , including an active or passive thermal heat sink cooling the leads by moving air or liquid, high thermal conductivity metal or active cooling agents such as piezoelectric coolers.

15. The die interconnect system of claim 4 wherein the low thermal transmissivity substrate section includes inorganic clay supported in polymers or oriented materials.

16. The die interconnect system of claim 1 , wherein the dielectric layer is completely or partially fused along the length of the leads.

Assignees

• Rosenberger Hochfrequenztechnik Gmbh & Co Kg

Inventors

• Cahill Sean S
• Sanjuan Eric A

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/752

  between stacked chips · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/07552

  changes in structures or sizes · CPC title