Buffering request data for in-memory cache

Patent metadata

Field	Value
Publication number	US-9858187-B2
Application number	US-201514922686-A
Country	US
Kind code	B2
Filing date	Oct 26, 2015
Priority date	Oct 26, 2015
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

Techniques are disclosed relating to an in-memory cache for web application data. In some embodiments, received transactions include multiple operations, including one or more cache operations to access the in-memory cache. In some embodiments, transactions are performed atomically. In some embodiments, data for the one or more cache operations is stored locally in memory by an application server outside of the in-memory cache until the transaction is successfully completed. This may improve performance and facilitate atomicity, in some embodiments.

First claim

What is claimed is:

1. A method, comprising:
an application server receiving a request to perform a transaction that includes a plurality of operations, including one or more cache operations to access an in-memory cache; and
the application server performing the transaction, including:
storing data corresponding to the one or more cache operations in memory outside of the in-memory cache until the transaction is successfully completed; and
caching data corresponding to the one or more cache operations in the in-memory cache after successful completion of the transaction.

2. The method of claim 1 , wherein the in-memory cache is distributed across a plurality of application servers.

3. The method of claim 1 , wherein the caching includes storing a final value of data based on multiple operations to a particular cache entry and does not include caching one or more intermediate values for the particular cache entry.

4. The method of claim 1 , further comprising:
using the data stored outside of the in-memory cache by a first one of the plurality of operations as input for a second one of the plurality of operations.

5. The method of claim 1 , wherein the stored data is not serialized, the method further comprising serializing at least a portion of the stored data before the caching.

6. The method of claim 1 , wherein the transaction is performed atomically.

7. The method of claim 1 , further comprising:
in response to a parameter in at least one of the one or more cache operations, performing the at least one of the one or more cache operations prior to successful completion of the transaction.

8. The method of claim 1 , further comprising:
maintaining a database of web application data, wherein at least a portion of the database of web application data is not stored in a system memory space, wherein the in-memory cache is separate from the database of web application data.

9. A system, comprising:
one or more processors; and
one or more memories having program instructions stored thereon that are capable of being executed by the one or more processors to cause operations comprising:
receiving a transaction that includes a plurality of operations, including one or more cache operations to access an in-memory cache; and
performing the transaction, including:
storing data corresponding to the one or more cache operations in memory outside of the in-memory cache until the transaction is successfully completed; and
caching data corresponding to the one or more cache operations in the in-memory cache after successful completion of the transaction.

10. The system of claim 9 , wherein the system includes a plurality of application servers and the caching includes storing data on multiples ones of the plurality of application servers.

11. The system of claim 9 , wherein the caching includes storing a final value of data based on multiple operations to a particular cache entry and does not include caching one or more intermediate values for the particular cache entry.

12. The system of claim 9 , wherein the operations further comprise using the data stored outside of the in-memory cache based on a first one of the plurality of operations as input for a second one of the plurality of operations.

13. The system of claim 9 , wherein the transaction is performed atomically.

14. The system of claim 9 , wherein the operations further comprise:
in response to an immediate parameter in at least one of the one or more cache operations, performing the at least one of the one or more cache operations by accessing the in-memory cache prior to successful completion of the transaction.

15. A non-transitory computer-readable medium having computer instructions stored thereon that are capable of causing operations comprising:
receiving a transaction that includes a plurality of operations, including one or more cache operations to access an in-memory cache; and
performing the transaction, including:
storing data corresponding to the one or more cache operations in memory outside of the in-memory cache until the transaction is successfully completed; and
caching data corresponding to the one or more cache operations in the in-memory cache after successful completion of the transaction.

16. The non-transitory computer-readable medium of claim 15 , wherein the in-memory cache is distributed across a plurality of application servers.

17. The non-transitory computer-readable medium of claim 15 , wherein the caching includes storing a final value of data based on multiple operations to a particular cache entry and does not include caching one or more intermediate values for the particular cache entry.

18. The non-transitory computer-readable medium of claim 15 , wherein the operations further comprise:
using the data stored outside of the in-memory cache by a first one of the plurality of operations as input for a second one of the plurality of operations.

19. The non-transitory computer-readable medium of claim 15 , wherein the transaction is performed atomically.

20. The non-transitory computer-readable medium of claim 15 , wherein the operations further comprise:
in response to a parameter in at least one of the one or more cache operations, performing the at least one of the one or more cache operations by accessing the in-memory cache prior to successful completion of the transaction.

Assignees

• Salesforce Com Inc

Inventors

• Sundaravaradan Barathkumar
• Wall Christopher James
• Lopez Lawrence Thomas
• Sydell Paul
• Duvur Sreeram
• Devadhar Vijayanth

Classifications

• G06F2212/621

  Coherency control relating to peripheral accessing, e.g. from DMA or I/O device · CPC title

• G06F12/0815 Primary

  Cache consistency protocols · CPC title

• G06F13/1642

  with request queuing · CPC title

• G06F13/1673 Primary

  using buffers · CPC title

• G06F12/0811

  with multilevel cache hierarchies · CPC title