Monitoring a data processing apparatus and summarising the monitoring data

Patent metadata

Field	Value
Publication number	US-9858169-B2
Application number	US-45828709-A
Country	US
Kind code	B2
Filing date	Jul 7, 2009
Priority date	Jul 9, 2008
Publication date	Jan 2, 2018
Grant date	Jan 2, 2018

Abstract

A data processing apparatus is disclosed that comprises monitoring circuitry for monitoring accesses to a plurality of addressable locations within said data processing apparatus that occur between start and end events said monitoring circuitry comprising: an address location store for storing data identifying said plurality of addressable locations to be monitored and a monitoring data store; said monitoring circuitry being responsive to detection of said start event to detect accesses to said plurality of addressable locations and to store monitoring data relating to a summary of said detected accesses in said monitoring data store; and said monitoring circuitry being responsive to detection of said end event to stop collecting said monitoring data; said monitoring circuit being responsive to detection of a flush event to output said stored monitoring data and to flush said monitoring data store.

First claim

We claim:

1. A data processing apparatus comprising:
at least one processing element to issue data access requests specifying an address over a bus to a memory, wherein said data access requests comprise read requests requesting data transfer to said at least one processing element from a location of said memory indicated by said address, or write requests requesting data transfer from said at least one processing element to a location of said memory indicated by said address; and
monitoring circuitry for monitoring accesses to a selected plurality of addressable locations within memory by said at least one processing element that occur between a start event and an end event, said monitoring circuitry being separate from said at least one processing element and including:
a reconfigurable address location store for storing data identifying said selected plurality of addressable locations to be monitored and a monitoring data store, wherein the selected plurality of addressable locations are limited to exclude at least one addressable location of said memory from said selected plurality of addressable locations; and
comparison circuitry to compare addresses of said data access requests issued over the bus by the at least one processing element with said data identifying said selected plurality of addressable locations,
said monitoring circuitry responsive to detection of said start event to employ said comparison circuitry to detect when data access requests to said selected plurality of addressable locations occur and to store monitoring data relating to a summary of said data access requests to said selected plurality of addressable locations; and
said monitoring circuitry responsive to detection of said end event to stop collecting said monitoring data and, responsive to detection of a flush event, to output said stored monitoring data and to flush said monitoring data store, wherein said start event, said end event, and said flush event each comprise one of:
(a) a memory barrier instruction included in code executed by the data processing apparatus, (b) writing to a control register, (c) accessing addresses within a particular region, (d) an interrupt, (e) a send event instruction included in code executed by the data processing apparatus, (f) a wait for event instruction included in code executed by the data processing apparatus, (g) a load exclusive instruction included in code executed by the data processing apparatus, (h) a store exclusive-instruction included in code executed by the data processing apparatus, (i) an atomic memory operation, (j) a memory barrier indication on a bus, (k) a load exclusive indication on a bus, (l) a store exclusive indication on a bus, and (m) an atomic memory access indication on a bus,
wherein said flush event comprises an internal event generated by said data processing apparatus.

2. A data processing apparatus according to claim 1 , wherein said start event, said end event, and said flush event are a same event, such that in response to said same event said monitoring circuitry is configured to output said monitoring data, flush said monitoring data store, and start detecting accesses to said selected plurality of addressable locations.

3. A data processing apparatus according to claim 1 , wherein said monitoring data that is output further comprises a signal identifying at least one of said start, flush, and end event.

4. A data processing apparatus according to claim 1 , wherein said monitoring data further comprises timestamp data indicating a time of each data access request.

5. A data processing apparatus according to claim 1 , wherein said summary of said detected data access requests comprises a fingerprint of said data access requests computed by a hash function.

6. A data processing apparatus according to claim 1 , wherein said summary of said detected data access requests comprises a count of said data access requests.

7. A data processing apparatus according to claim 6 , wherein said monitoring circuitry comprises a counter for counting a number of data access requests to said selected plurality of addressable locations.

8. A data processing apparatus according to claim 1 , wherein said selected plurality of addressable locations comprises at least one of a range of addresses, a plurality of ranges of addresses, a set of particular addresses, and an inverse of a range of addresses.

9. A data processing apparatus according to claim 1 , wherein said selected plurality of addressable locations comprises a plurality of ranges of addresses, and said summary of said detected data access requests comprises an indication of which of said plurality of address ranges said data access requests were to.

10. A data processing apparatus according to claim 1 , wherein said summary of said detected data access requests further comprises data indicating at least one of a type of data access request, identifiers identifying entities making said data access requests, data indicating a number of each type of said data access request by at least one of said entity and an indication of which of a plurality of address ranges said data access requests were made to.

11. A data processing apparatus according to claim 10 , wherein said monitoring circuitry comprises a plurality of counters, each counter relating to at least one of: one or more of said entities, one or more of said plurality of address ranges, and a type of data access.

12. A data processing apparatus according to claim 10 , wherein said monitoring circuitry is coupled to a bus port within said data processing apparatus, said entities comprising a plurality of bus masters.

13. A data processing apparatus according to claim 1 , wherein said monitoring data store comprises a cache.

14. A data processing apparatus according to claim 13 , wherein said summary of said detected data access requests further comprises data indicating at least one of a type of data access request, identifiers identifying entities making said data access requests, and data indicating a number of each type of said data access requests by at least one of said entity, and an indication of which of a plurality of address ranges said data access requests were made to, said cache being configured to store a plurality of sets of monitoring data each set relating to at least one of one or more of said entities, a type of data access request and one or more of said plurality of address ranges.

15. A data processing apparatus according to claim 14 , wherein said monitoring circuitry is configured to flush one of said plurality of sets of monitoring data in response to detection of said cache being full and to a detected data access request.

16. A data processing apparatus according to claim 1 , said data processing apparatus comprising a plurality of processing elements and a plurality of monitoring circuitry.

17. A data processing apparatus according to claim 1 , said data processing apparatus further comprising an event configuration store, said data processing apparatus being configured to write to said event configuration store in response to a predetermined instructions, said monitoring circuitry being responsive to a value stored in said event configuration store to either start monitoring said selected plurality of addressable locations, output said monitoring data, or flush said monitoring data.

18. A data processing apparatus according to claim 1 , comprising a data input for receiving data for updating said address location store for storing data identifying said selected plurality of addressable locati

Assignees

• Reid Alastair David
• Kneebone Katherine Elizabeth
• Guffens Jan
• Smith Lee Douglas
• Advanced Risc Mach Ltd

Inventors

• Reid Alastair David
• Kneebone Katherine Elizabeth
• Guffens Jan
• Smith Lee Douglas

Classifications

• G06F11/3471 Primary

  Address tracing · CPC title

• G06F11/348 Primary

  Circuit details, i.e. tracer hardware · CPC title

• G06F2201/88

  Monitoring involving counting · CPC title

• G06F2201/86

  Event-based monitoring · CPC title