Methods and apparatus for an images sensor with row-level gain control

US9854186B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9854186-B2
Application numberUS-201615161519-A
CountryUS
Kind codeB2
Filing dateMay 23, 2016
Priority dateFeb 5, 2016
Publication dateDec 26, 2017
Grant dateDec 26, 2017

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  1. Title

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  2. Abstract

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Abstract

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Various embodiments of the present technology may comprise methods and systems image sensors. The methods and systems may comprise selectively activating either high or low conversion gain mode for a predetermined number of rows by comparing pixel row data to predetermined threshold values prior to image signal processing.

First claim

Opening claim text (preview).

The invention claimed is: 1. An image sensor comprising: an array of pixels, arranged in rows and columns, wherein each pixel is configured to: operate in a high conversion gain mode and a low conversion gain mode; and apply one of a high conversion gain and a low conversion gain to a plurality of pixel signals prior to signal readout; a column circuit coupled to the array and configured to receive the plurality of pixel signals from the array; a gain control circuit coupled to the column circuitry and the array, and configured to: receive the pixel signals; and select the gain mode for a row of pixels according to the pixel signals received from at least one different row of pixels. 2. The image sensor of claim 1 , wherein the gain control circuit further comprises a storage device storing pixel data. 3. The image sensor of claim 1 , wherein the gain control circuit is further configured to set the gain mode for the row of pixels by comparing a statistical value derived from the pixel signals received from the at least one different row of pixels to a high threshold value and a low threshold value. 4. The image sensor of claim 1 , wherein the gain control circuit is further configured to set the gain mode for the row of pixels by transmitting a first signal to the pixel array representing the high conversion gain mode and a second signal representing the low conversion gain mode. 5. The image sensor of claim 1 , wherein the gain control circuit is further configured to transmit a control signal indicating the gain mode for the row of pixels via a control line to a transistor comprising: a first terminal coupled to a charge storage region; a second terminal coupled to a capacitor; and a third terminal coupled to the control line. 6. The image sensor of claim 5 , wherein the pixel operates in low conversion gain mode when the transistor is turned on, and the pixel operates in high conversion gain mode when the transistor is turned off. 7. The image sensor of claim 1 , further comprising a row selector configured to selectively activate the row of pixels via a row select line, wherein the row select line is electrically connected to each pixel in a given row. 8. The image sensor of claim 1 , further comprising an I/O device configured to communicate with an image signal processor. 9. The image sensor of claim 1 , wherein the gain control circuit and the array of pixels are formed on the same silicon die. 10. An imaging system comprising: an image sensor comprising: an array of pixels, arranged in rows and columns, wherein each pixel: operates in a high conversion gain mode and a low conversion gain mode; and applies one of a high conversion gain and a low conversion gain to a plurality of pixel signals prior to signal readout; column circuitry coupled to the array and configured to receive the plurality of pixel signals from the array; a gain control circuit coupled to the column circuitry and the array, wherein the gain control circuit is configured to: receive the pixel signals; derive a statistical value from the pixel signals; select a gain mode for a row of pixels based on the statistical value; and provide a control signal to the array, wherein the row of pixels are configured to operate in the selected gain mode in response to the control signal; and an image signal processor coupled to the image sensor and configured to receive and process the pixel signal, and transmit a final output signal. 11. The imaging system of claim 10 , wherein the gain control circuit further comprises a storage device configured as memory cells. 12. The imaging system of claim 10 , wherein the gain control circuit is configured to select the gain mode for the row of pixels based on the statistical value by comparing the statistical value to a high threshold value and a low threshold value. 13. The imaging system of claim 10 , wherein each pixel comprises a transistor comprising: a first terminal coupled to a charge storage region; a second terminal coupled to a capacitor; and a third terminal coupled to the control signal. 14. The imaging system of claim 13 , wherein each pixel operates in low conversion gain mode when the transistor is turned on, and operates in high conversion gain mode when the transistor is turned off. 15. The imaging system of claim 10 , further comprising a row selector configured to selectively activate the row of pixels via a row select line, wherein the row select line is electrically connected to each pixel in a given row. 16. The imaging system of claim 10 , wherein the image signal processor performs gamma correction on the row of pixels utilizing a curve coefficient. 17. The imaging system of claim 16 , wherein the curve coefficient is selected based on the selected gain mode. 18. The imaging system of claim 16 , wherein the gamma correction is based on a sigmoid curve. 19. The imaging system of claim 10 , wherein at least a part of the image sensor and at least a part of the image signal processor are formed on the same silicon die. 20. A method for improving high dynamic range in an image sensor comprising: arranging an array of dual conversion gain pixels in rows and columns, wherein each pixel is configured to operate in a high conversion gain mode and a low conversion gain mode; selectively activating a row of pixels to produce pixel signals; receiving, with a gain control circuit, the pixel signals from the activated row; calculating a statistical value of the pixel signals from the activated row; comparing the statistical value to a first threshold value and a second threshold value; selecting a control signal wherein: a first control signal is selected if the statistical value is less than or equal to the first threshold value; and a second control signal is selected if the statistical value is greater than or equal to the second threshold value; transmitting one of the first control signal and second control signal to a subsequent row of pixels; operating the subsequent row of pixels in one of the high conversion gain mode or the low conversion gain mode according to the control signal; and receiving and processing the pixel signals with an image signal processor.

Assignees

Inventors

Classifications

  • Addressed sensors, e.g. MOS or CMOS sensors · CPC title

  • H04N23/76Primary

    by influencing the image signals · CPC title

  • H04N25/59Primary

    by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title

  • Electricity · mapped topic

  • H04N5/3559Primary

    Electricity · mapped topic

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What does patent US9854186B2 cover?
Various embodiments of the present technology may comprise methods and systems image sensors. The methods and systems may comprise selectively activating either high or low conversion gain mode for a predetermined number of rows by comparing pixel row data to predetermined threshold values prior to image signal processing.
Who is the assignee on this patent?
Semiconductor Components Ind Llc
What technology area does this patent fall under?
Primary CPC classification H04N23/76. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 26 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).