Software programmable, multi-segment capture bandwidth, delta-sigma modulators for flexible radio communication systems

Patent metadata

Field	Value
Publication number	US-9853843-B2
Application number	US-201515103287-A
Country	US
Kind code	B2
Filing date	Nov 6, 2015
Priority date	Nov 6, 2014
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

A cellular radio architecture that includes a multiplexer coupled to an antenna structure and including multiple signal paths, where each signal path includes a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals. The architecture also includes a receiver module having a separate signal channel for each of the signal paths in the multiplexer, where each signal channel in the receiver module includes a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal. The delta-sigma modulator includes an LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

First claim

What is claimed is:

1. A transceiver front-end circuit for a cellular radio, said transceiver circuit comprising:
an antenna structure operable to transmit signals and receive signals;
a multiplexer coupled to the antenna structure and including a plurality of signal paths, each signal path including a bandpass filter that passes a different frequency band than the other bandpass filters and a circulator that provides signal isolation between the transmit signals and the receive signals;
a receiver module including a separate signal channel for each of the signal paths in the multiplexer, each signal channel in the receiver module including a receiver delta-sigma modulator that converts analog receive signals to a representative digital signal, each receiver delta-sigma module including an LC filter; and
a transmitter module including a transmitter delta-sigma modulator for converting digital data bits to the transmit signals, said transmitter module including a tunable bandpass filter, a switch for directing the transmit signals to a particular signal path, and a power amplifier for each signal path and for amplifying the transmit signal before transmitting.

2. The transceiver front-end circuit according to claim 1 wherein each receiver delta-sigma modulator further includes a combiner, a low noise amplifier (LNA) and a quantizer circuit, said combiner receiving the receive signals from the circulator and a feedback signal from the quantizer circuit and providing an error signal to the LNA to provide an amplified error signal, said amplifier error signal being provided to the LC filter to provide a filtered error signal, and the filtered error signal being provided to the quantizer circuit.

3. The transceiver front-end circuit according to claim 1 wherein each receiver delta-sigma modulator further includes a low noise amplifier (LNA), a summation node and a quantizer circuit, said LNA amplifying the receive signals, said summation node receiving an amplified receive signal from the LNA and a feedback signal from the quantizer circuit and providing an error signal, said error signal being provided to, the quantizer circuit.

4. The transceiver front-end circuit according to claim 1 wherein the LC filter is a sixth-order filter.

5. The transceiver front-end circuit according to claim 1 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

6. The transceiver front-end circuit according to claim 5 wherein each LC circuit includes an inductor and a capacitor array where the capacitor array includes a plurality of capacitors controlled by switches that provide coarse and fine tuning.

7. The transceiver front-end circuit according to claim 6 wherein the capacitor array receives frequency control bits.

8. The transceiver front-end circuit according to claim 5 wherein the LC filter includes a low-speed digital-to-analog converter (DAC) array that receives coefficient control bits to control the integrator circuits.

9. The transceiver front-end circuit according to claim 1 wherein the cellular radio is a vehicle cellular radio.

10. The transceiver front-end circuit according to claim 1 wherein the multiplexer is a triplexer and the plurality of signal paths in three signal paths.

11. A receiver module for a transceiver front-end circuit in a vehicle cellular radio, said receiver module comprising:
a delta-sigma modulator that converts analog receive signals to a representative digital signal, said delta-sigma modulator including;
a sixth-order LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter,
a combiner,
a low noise amplifier (LNA), and
a quantizer circuit, said combiner receiving the receive signals and a feedback signal from the quantizer circuit and providing an error signal to the LNA to provide an amplified error signal, said amplifier error signal being provided to the LC filter to provide a filtered error signal, and the filtered error signal being provided to the quantizer circuit.

12. The receiver module according to claim 11 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

13. The receiver module according to claim 12 wherein each LC circuit includes an inductor and a capacitor array where the capacitor array includes a plurality of capacitors controlled by switches that provide coarse and fine tuning.

14. The receiver module according to claim 13 wherein the capacitor array receives frequency control bits.

15. The receiver module according to claim 12 wherein the LC filter includes a low-speed digital-to-analog converter (DAC) array that receives coefficient control bits to control the integrator circuits.

16. A receiver module for a transceiver front-end circuit in a vehicle cellular radio, said receiver module comprising:
a delta-sigma modulator that converts analog receive signals to a representative digital signal, said delta-sigma modulator including;
a sixth-order LC filter having a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter,
a low noise amplifier (LNA),
a summation node, and
a quantizer circuit, said LNA amplifying the receive signals, said summation node receiving an amplified receive signal from the LNA and a feedback signal from the quantizer circuit and providing an error signal, said error signal being provided to the quantizer circuit.

17. The receiver module according to claim 16 wherein the LC filter includes a plurality of LC resonator circuits, a plurality of transconductance amplifiers and a plurality of integrator circuits, where a combination of one resonator circuit, transconductance amplifier and integrator circuit represents a two-order stage of the LC filter.

18. The receiver module according to claim 17 wherein each LC circuit includes an inductor and a capacitor array where the capacitor array includes a plurality of capacitors controlled by switches that provide coarse and fine tuning.

19. The receiver module according to claim 18 wherein the capacitor array receives frequency control bits.

20. The receiver module according to claim 17 wherein the LC filter includes a low-speed digital-to-analog converter (DAC) array that receives coefficient control bits to control the integrator circuits.

Assignees

• Gm Global Tech Operations Llc

Inventors

• Talty Timothy J
• Baringer Cynthia D
• Ahmed Mohiuddin
• Cosand Albert E
• Li James Chingwei
• Petre Peter
• Xu Zhiwei A
• Kuan Yen-Cheng

Classifications

• H04B14/06 Primary

  using differential modulation, e.g. delta modulation · CPC title

• H03M3/464

  Details of the digital/analogue conversion in the feedback path · CPC title

• H03M3/438

  the modulator having a higher order loop filter in the feedforward path · CPC title

• H04B1/525

  with means for reducing leakage of transmitter signal into the receiver · CPC title

• H04B1/18

  Input circuits, e.g. for coupling to an antenna or a transmission line (coupling networks between antennas or lines and receivers independent of the nature of the receiver H03H) · CPC title