Error-feedback digital-to-analog converter (DAC)

Patent metadata

Field	Value
Publication number	US-9853654-B2
Application number	US-201514631578-A
Country	US
Kind code	B2
Filing date	Feb 25, 2015
Priority date	Feb 25, 2015
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

In one embodiment, a method for converting an input digital signal into an analog signal is provided. The method comprises modulating the input digital signal into a modulated digital signal, and converting the modulated digital signal into the analog signal using a digital-to-analog converter (DAC). The modulation shapes quantization noise of the DAC to place a notch at a frequency within an out-of-bound frequency band to reduce the quantization noise within the out-of-bound frequency band.

First claim

What is claimed is:

1. A circuit, comprising:
a transmit mode controller configured to adjust a sampling frequency of an input digital signal;
an error-feedback modulator configured to receive the input digital signal, and to modulate the digital input signal into a modulated digital signal; and
a digital-to-analog converter (DAC) configured to convert the modulated digital signal into an analog signal;
wherein the error-feedback modulator is configured to modulate the input digital signal to shape quantization noise of the DAC to produce a notch, and the transmit mode controller is configured to adjust the sampling frequency of the input signal to place the notch at a frequency within an out-of-bound frequency band to reduce the quantization noise within the out-of-bound frequency band.

2. The circuit of claim 1 , further comprising a low-pass filter configured to low-pass filter the analog signal.

3. The circuit of claim 2 , wherein the low-pass filter is a first-order low-pass filter, a second-order low-pass filter, or a third order low-pass filter.

4. The circuit of claim 1 , wherein the out-of-band frequency band corresponds to a receive frequency band of a receiver.

5. The circuit of claim 4 , wherein the receiver is located on a same mobile device as the circuit.

6. The circuit of claim 1 , wherein the out-of-band frequency band corresponds to a frequency band of a channel on which a mobile device receives signals.

7. The circuit of 1 , wherein the error-feedback modulator comprises:
an adder; and
a feedback filter;
wherein the adder is configured to add an output signal of the feedback filter to the input digital signal, and M most significant bits (MSBs) of an output signal of the adder provide the modulated digital signal of the modulator;
wherein the feedback filter is configured to filter N least significant bits (LSBs) of the output signal of the adder to generate the output signal of the feedback filter.

8. The circuit of claim 1 , wherein the DAC comprises:
a first conversion circuit configured to convert K most significant bits (MSBs) of the modulated digital signal into a first analog current; and
a second conversion circuit configured to convert L least significant bits (LSBs) of the modulated digital signal into a second analog current;
wherein the first and second analog currents are combined to obtain the analog signal.

9. The circuit of claim 8 , wherein the first conversion circuit comprises:
a binary-to-thermometer decoder configured to decode the K MSBs of the modulated digital signal into one of a plurality of current levels; and
a first plurality of current cells, wherein each of the first plurality of current cells is configured to be selectively enabled by the decoder, and each of the first plurality of current cells is configured to contribute a current to the first analog current when enabled by the decoder;
wherein the decoder is configured to enable a number of the first plurality of current cells based on the one of the plurality of current levels.

10. The circuit of claim 9 , wherein the second conversion circuit comprises:
a segmented resistor circuit; and
a second plurality of current cells, wherein each of the second plurality of current cells is configured to selectively output a current to a different node on the segmented resistor circuit depending on a value of a respective one of the L LSBs of the modulated digital signal, and the segmented resistor is configured to passively split the current at each node.

11. The circuit of claim 10 , wherein each of the first and second plurality of current cells outputs approximately a same amount of current.

12. The circuit of claim 1 , wherein a number of bits of the modulated digital signal is less than a number of bits of the input digital signal.

13. The circuit of claim 1 , wherein the error-feedback modulator comprises a feedback filter, and the transmit mode controller is configured to adjust filter coefficients of the feedback filter based on a selected one of a plurality of transmit modes.

14. The circuit of claim 13 , wherein each of the transmit modes corresponds to a different transmit band.

15. A method for converting an input digital signal into an analog signal, comprising:
adjusting a sampling frequency of the input digital signal;
modulating the input digital signal into a modulated digital signal; and
converting the modulated digital signal into the analog signal using a digital-to-analog converter (DAC);
wherein the modulating shapes quantization noise of the DAC to produce a notch, and adjusting the sampling frequency of the input digital signal comprises adjusting the sampling frequency of the input digital signal to place the notch at a frequency within an out-of-bound frequency band to reduce the quantization noise within the out-of-bound frequency band.

16. The method of claim 15 , further comprising low-pass filtering the analog signal.

17. The method of claim 16 , wherein low-pass filtering the analog signal comprises low-passing the analog signal using a first-order low-pass filter, a second-order low-pass filter, or a third order low-pass filter.

18. The method of claim 15 , wherein the out-of-band frequency band corresponds to a receive frequency band of a receiver.

19. The method of claim 15 , wherein the out-of-band frequency band corresponds to a frequency band of a channel on which a mobile device receives signals.

20. The method of claim 15 , wherein converting the modulated digital signal into the analog signal comprises:
converting K most significant bits (MSBs) of the modulated digital signal into a first analog current;
converting L least significant bits (LSBs) of the modulated digital signal into a second analog current; and
combining the first and second analog currents to obtain the analog signal.

21. The method of claim 20 , wherein converting the K MSBs of the modulated digital signal into the first analog signal comprises:
decoding the K MSBs of the modulated digital signal into one of a plurality of current levels using a binary-to-thermometer decoder; and
adjusting a current level of the first analog current based on the one of the plurality of current levels.

22. The method of claim 21 , wherein converting the L LSBs of the modulated digital signal into the second analog signal comprises:
outputting a plurality of currents to different nodes of a segmented resistor circuit based on values of the L LSBs of the modulated digital signal; and
obtaining the second analog signal from an output node of the segmented resistor circuit.

23. The method of claim 15 , wherein modulating the input digital signal into the modulated digital signal is performed using a feedback filter, and the method further comprises adjusting filter coefficients of the feedback filter.

24. An apparatus for converting an input digital signal into an analog signal, comprising:
means for adjusting a sampling frequency of the input digital signal;
means for modulating the input digital signal into a modulated digital signal; and
means for converting the modulated digital signal into the analog signal;
wherein the modulating shapes quantization noise of the DAC to produce a notch, and the means for adjusting the sampling frequency of the input digital signal comprises means for adjusting the sampling frequency of the input digital signal to place the notch at a frequency within an out-of-bound frequency

Assignees

• Qualcomm Inc
• Qualcomm Inc

Inventors

• Naderi Alizadeh Mohammadhossein
• Mehdizad Taleie Shahin
• Seo Dongwon

Classifications

• H03M3/502

  Details of the final digital/analogue conversion following the digital delta-sigma modulation · CPC title

• H03M7/3042

  the modulator being of the error feedback type, i.e. having loop filter stages in the feedback path only · CPC title

• H03M1/687 Primary

  Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type · CPC title

• H03M3/368

  of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators · CPC title

• H03M1/002

  Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed · CPC title