Mechanism for extending cycle life of a battery

Patent metadata

Field	Value
Publication number	US-9853471-B2
Application number	US-201414572757-A
Country	US
Kind code	B2
Filing date	Dec 16, 2014
Priority date	Dec 16, 2014
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

Described is an apparatus for extending cycle-life of a battery cell, where the apparatus comprises: a monitor to monitor a rate of degradation of a battery cell overtime; a comparator to compare the rate of degradation with a threshold; and logic to adjust one or more charge parameters of the battery cell when the rate of degradation crosses the threshold. Described is a method which comprises: monitoring a rate of degradation of a battery cell overtime; comparing the rate of degradation with a threshold; and adjusting one or more charge parameters of the battery cell when the rate of degradation crosses the threshold. Described is a machine-readable storage media having machine executable instructions stored thereon that, when executed, causes one or more processors to perform the method described above.

First claim

I claim:

1. A machine-readable storage media having machine executable instructions stored thereon that, when executed, causes a processor to perform a method, the method comprising:
monitoring a rate of degradation of a battery cell overtime, wherein the rate of degradation is a ratio of a difference in capacity of the battery cell to a difference in number of charge/discharge cycles;
comparing the rate of degradation with a threshold; and
adjusting one or more charge parameters of the battery cell when the rate of degradation crosses the threshold, wherein the adjusting of the one or more charge parameters is to slow the rate of degradation of the battery cell to extend cycle life of the battery cell.

2. The machine-readable storage media of claim 1 comprising maintaining the one or more charge parameters at their present values when the rate of degradation remains substantially the same.

3. The machine-readable storage media of claim 1 , wherein comparing the rate of degradation with a threshold comprises comparing an average of the rate of degradation over multiple charge-discharge cycles.

4. The machine-readable storage media of claim 1 , wherein adjusting of the one or more charge parameters comprises reducing charge current.

5. The machine-readable storage media of claim 1 , wherein adjusting of the one or more charge parameters comprises reducing charge-discharge voltage.

6. The machine-readable storage media of claim 1 , wherein adjusting of the one or more charge parameters comprises reducing charge current and reducing charge-discharge voltage.

7. The machine-readable storage media of claim 1 , wherein the threshold is a programmable threshold.

8. The machine-readable storage media of claim 1 , wherein the one or more charge parameters are at least one of:
a charge current;
a charge-discharge voltage; or
a combination of charge current and charge-discharge voltage.

9. An apparatus comprising:
a monitor to monitor a rate of degradation of a battery cell overtime, wherein the rate of degradation is a ratio of a difference in capacity of the battery cell to a difference in number of charge/discharge cycles;
a comparator to compare the rate of degradation with a threshold; and
logic to adjust one or more charge parameters of the battery cell when the rate of degradation crosses the threshold, wherein the logic is to adjust of the one or more charge parameters to slow the rate of degradation of the battery cell to extend cycle life of the battery cell.

10. The apparatus of claim 9 , wherein the logic is operable to maintain the one or more charge parameters at their present values when the rate of degradation remains substantially the same.

11. The apparatus of claim 9 , wherein the comparator is to compare the rate of degradation with a threshold by comparing an average of the rate of degradation over multiple charge-discharge cycles.

12. The apparatus of claim 9 , wherein the logic is to adjust the one or more charge parameters by reducing charge current.

13. The apparatus of claim 9 , wherein the logic is to adjust the one or more charge parameters by reducing the charge-discharge voltage.

14. The apparatus of claim 9 , wherein the logic is to adjust the one or more charge parameters by reducing charge current and reducing charge-discharge voltage.

15. The apparatus of claim 9 , wherein the threshold is a programmable threshold.

16. The apparatus of claim 9 , wherein the one or more charge parameters are at least one of:
a charge current;
a charge-discharge voltage; or
a combination of charge current and charge-discharge voltage.

17. A system comprising:
a memory;
a processor coupled to the memory;
a battery to provide power to the memory and the processor, the battery having circuitry including:
a comparator to compare a rate of degradation with a threshold, wherein the rate of degradation is a ratio of a difference in capacity of the battery cell to a difference in number of charge/discharge cycles; and
logic to adjust one or more charge parameters of the battery when the rate of degradation crosses the threshold, wherein the logic is to adjust of the one or more charge parameters to slow the rate of degradation of the battery cell to extend cycle life of the battery cell; and

a wireless interface to allow the processor to communicate with another device.

18. The system of claim 17 , wherein the logic is operable to maintain the one or more charge parameters at their present values when the rate of degradation remains substantially the same.

19. The system of claim 17 , wherein the logic is operable to maintain the one or more charge parameters at their present values when the rate of degradation remains substantially the same.

20. The system of claim 17 , wherein the one or more charge parameters are at least one of:
a charge current;
a charge-discharge voltage; or
a combination of charge current and charge-discharge voltage.

Assignees

• Intel Corp

Inventors

• Keates Andrew

Classifications

• H02J7/82 Primary

  Control of state of charge [SOC] · CPC title

• H02J7/92 Primary

  with prioritisation of loads or sources · CPC title

• H01M10/4257

  Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries · CPC title

• H02J7/00 Primary

  Circuit arrangements for charging or discharging batteries or for supplying loads from batteries · CPC title

• H02J2007/005

  Electricity · mapped topic