Extensible timer for chip card communications

Patent metadata

Field	Value
Publication number	US-9852412-B1
Application number	US-201414472217-A
Country	US
Kind code	B1
Filing date	Aug 28, 2014
Priority date	Aug 28, 2014
Publication date	Dec 26, 2017
Grant date	Dec 26, 2017

Abstract

A payment card reader for reading integrated circuit (IC) payment cards is disclosed. The payment card reader includes a microcontroller having non-programmable logic, coupled with a data input from the IC payment card, configured to effect a first implementation of a communication standard for communication between the microprocessor and the IC payment card, the non-programmable logic comprising a non-programmable hardware timer. The microcontroller also includes extensible logic, coupled with the data input via a general-purpose input/output (GPIO) pin, the extensible logic configured to include an extensible timer and interrupt logic, the extensible timer and interrupt logic for use with the non-programmable logic and the data input to effect a second implementation of the communication standard for communication between the microprocessor and the IC payment card.

First claim

What is claimed is:

1. A mobile point-of-sale (POS) terminal for processing a financial transaction between a buyer and a merchant, the mobile POS terminal comprising:
a mobile computing device running a register application, wherein the register application is configured to receive financial information associated with the buyer from a payment card reader for facilitating a transfer of funds from the buyer to the merchant; and
the payment card reader coupled with the mobile computing device, the payment card reader comprising:
a card interface within a card slot, the card interface having projections for contacting an integrated circuit (IC) of an IC payment card, the card slot configured to receive the IC payment card, the card interface configured to receive the financial information associated with the buyer from the IC of the IC payment card using a communication standard; and
a microprocessor comprising:
a card interface connection configured to convey one or more communications between the microprocessor and the card interface;
a general-purpose input/output (GPIO) pin coupled with the card interface connection;
a non-programmable hardware timer configured to count a first waiting time previously defined by a first implementation of the communication standard;
a non-programmable logic, coupled with the card interface connection and the non-programmable hardware timer, the non-programmable logic configured to effect the first implementation of the communication standard for communication between the payment card reader and the IC payment card, the non-programmable logic to detect a communication between the IC payment card and the payment card reader;
an extensible timer; and
an extensible logic, coupled with the GPIO pin and the extensible timer and the non-programmable hardware timer, the extensible logic to effect a second implementation of the communication standard for communication between the payment card reader and the IC payment card by extending wherein the first waiting time to a second waiting time in response to detection that the non-programmable hardware timer has finished counting the first waiting time, the second waiting time previously defined by the second implementation of the communication standard.

2. The mobile POS terminal of claim 1 , wherein the first implementation of the communication standard is a hardware implementation of an International Organization for Standardization (ISO) 7816 standard, and the second implementation of the communication standard is a Europay, MasterCard, and Visa (EMV) standard.

3. A payment card reader comprising:
a microprocessor of the payment card reader;
a card interface connection configured to convey one or more communications between the microprocessor and a card interface of the payment card reader, the card interface to receive financial information from a payment card using a communication standard;
a general-purpose input/output (GPIO) pin of the microprocessor, the GPIO pin coupled with the card interface connection;
a non-programmable hardware timer of the microprocessor, the non-programmable hardware timer configured to count a first length of time that is previously defined by a first implementation of the communication standard;
a non-programmable logic of the microprocessor that is coupled with the card interface connection and the non-programmable hardware timer, wherein the non-programmable logic is configured to effect the first implementation of the communication standard for communication between the microprocessor and the IC payment card using the non-programmable hardware timer;
an extensible timer of the microprocessor; and
an extensible logic of the microprocessor that is coupled with the GPIO pin and the extensible timer and the non-programmable hardware timer, wherein the extensible logic is configured to effect a second implementation of the communication standard for communication between the microprocessor and the IC payment card by extending the first length of time to a second length of time in response to detection that the non-programmable hardware timer has finished counting the first length of time.

4. The payment card reader of claim 3 , wherein the first implementation of the communication standard is a hardware implementation of an International Organization for Standardization (ISO) 7816 standard, and the second implementation of the communication standard is a Europay, MasterCard, and Visa (EMV) standard.

5. The payment card reader of claim 3 , wherein to the second length of time is previously defined by the second implementation of the communication standard.

6. The payment card reader of claim 3 , wherein the non-programmable logic is configured to:
detect transmission of a first character of data; and
start the non-programmable hardware timer in response to detecting transmission of the first character of the data, the non-programmable hardware timer configured to run the first length of time within which a second character of the data should be detected.

7. The payment card reader of claim 3 , wherein the extensible logic detects that the non-programmable hardware timer has finished counting the first length of time by detecting an interrupt output by the non-programmable hardware timer.

8. The payment card reader of claim 6 , wherein the microprocessor is configured to:
detect that the second character of the data has not been transmitted within the second length of time; and
send a time-out error signal to the card interface of the payment card reader via the card interface connection.

9. The payment card reader of claim 6 , wherein the microprocessor is configured to:
detect transmission of the second character of the data within the second length of time; and
intercept a time-out error signal, thereby cancelling transmission of the time-out error signal time.

10. The payment card reader of claim 7 , wherein the first length of time and the second length of time are each one of: a work waiting time (WWT), a character waiting time (CWT), or a block waiting time (BWT).

11. A computer-implemented method comprising:
detecting, by a payment card reader, a first bit of a first character of data transmitted between a card interface of the payment card reader and an integrated circuit (IC) of a payment card;
starting a first timer of the payment card reader in response to detecting the first bit of the first character of the data, the first timer configured to run a first length of time within which a first bit of a second character of the data should be detected, wherein the first length of time is previously defined by a first implementation of a communication standard for communication between the card interface of the payment card reader and the IC of the payment card;
detecting, by the payment card reader, that the first timer has expired; and
starting a second timer of the payment card reader in response to detection of the first timer expiring, the second timer configured to run a second length of time within which the first bit of the second character of the data should be detected, wherein a sum of the first length of time and the second length of time is previously defined by a second implementation of the communication standard for communication between the card interface of the payment card reader and the IC of the payment card.

12. The method of claim 11 , further comprising:
detecting, by the payment card reader, that the first bit of the second character of the data has not been transmitted between the card interface of the payment card reader and the IC of the payment card within the second length of time; and
sending a time-out

Assignees

• Square Inc

Inventors

• Post Daniel Jeffrey
• Khan Imran

Classifications

• G06Q20/204 Primary

  comprising interface for record bearing medium or carrier for electronic funds transfer or payment credit · CPC title

• G06Q20/322

  Aspects of commerce using mobile devices [M-devices] · CPC title

• G06Q20/341

  Active cards, i.e. cards including their own processing means, e.g. including an IC or chip · CPC title

• G07F7/0873 Primary

  Details of the card reader · CPC title

• G06K7/0013

  by galvanic contacts, e.g. card connectors for ISO-7816 compliant smart cards or memory cards, e.g. SD card readers (connectors in general H01R13/00; connectors for SIM cards used in mobile phones or the like H04B1/3816) · CPC title