Image sensor performing selective multiple sampling and operating method thereof
US-2024048869-A1 · Feb 8, 2024 · US
US9848138B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9848138-B2 |
| Application number | US-201415032562-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 29, 2014 |
| Priority date | Oct 29, 2013 |
| Publication date | Dec 19, 2017 |
| Grant date | Dec 19, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
An electronic read circuit for a radiation detector comprises: an element sensitive to the radiation, an injection circuit, able to inject a charge at one terminal of the sensitive element, the injection circuit extending between at least one input terminal and one output terminal, the output terminal being able to be connected to the sensitive element, the injection circuit being able to produce a charge under the effect of a trigger pulse. The injection circuit is able to inject a first charge when an input terminal is connected to a first input potential and a second charge when an input terminal is connected to a second input potential. The circuit comprises means for storing a difference between an output potential of the injection circuit, called equilibrium potential, and a reference potential, such that the second charge depends on the second input potential and on the equilibrium potential.
Opening claim text (preview).
The invention claimed is: 1. An electronic circuit for radiation detector comprising: a radiation-sensitive element, an injection circuit, suitable for injecting a charge at a terminal of the radiation-sensitive element, the injection circuit extending between at least one input terminal and one output terminal, the output terminal being suitable for being connected to said radiation-sensitive element, the injection circuit being suitable for producing a charge under the effect of a trigger pulse, a comparator having a switchover potential with a first input receiving a threshold potential and a second input suitable for being connected to an integration node that can store electrical charges generated by the radiation-sensitive element on reception of the radiation, the charges bringing about a variation of a potential at the integration node, the injection circuit being suitable for injecting charges at the integration node on each switchover of the comparator until the potential at the integration node reaches or exceeds an equilibrium potential, wherein the injection circuit is suitable for injecting a first charge when an input terminal is connected to a first input potential and a second charge when an input terminal is connected to a second input potential, the electronic circuit comprises a storage means for storing a difference between the equilibrium potential and a reference potential, the equilibrium potential corresponding to an output potential of the injection circuit after one or more injections of the first charge, the reference potential being a fixed potential, the storage means for storing being connected to an input of the comparator, said input being suitable to be connected to an output of the comparator, so that the input of the comparator is connected to the output of the comparator during an injection of the first charge, and wherein the injection circuit is suitable for injecting the second charge dependent on the second input potential and on said equilibrium potential. 2. The electronic circuit as claimed in claim 1 , further comprising a means for storing said potential difference after a predetermined number of trigger pulses. 3. The electronic circuit as claimed in claim 1 , comprising a first switch connected between the radiation-sensitive element and the integration node. 4. The electronic circuit as claimed in claim 3 , wherein the storage means comprises: a second capacitor linked to the second input of the comparator, a third switch connected between the second input of the comparator to which the second capacitor is linked and the output of the comparator. 5. The electronic circuit as claimed in claim 4 , wherein the third switch is a transistor of MOS type comprising a gate, a source, a drain, the source and the drain forming two terminals, wherein a first terminal is connected to the second input of the comparator and a second terminal is connected to the output of the comparator, and wherein the electronic circuit comprises: a fourth switch connected between the drain of the third switch and the output of the comparator, a third capacitor connected between the drain of the third switch and a second fixed voltage, a fourth capacitor connected between the two terminals of the third switch. 6. The electronic circuit as claimed in claim 5 , wherein the transistor forming the third switch is produced on a substrate, and wherein the substrate is connected to the drain. 7. The electronic circuit as claimed in claim 3 , wherein the storage means comprises: a fifth capacitor linked to the first input of the comparator, a third switch connected between the first input of the comparator to which the fifth capacitor is linked and the output of the comparator. 8. The electronic circuit as claimed in claim 3 , comprising a counter connected at the output of the comparator, so as to count the number of switchovers of the comparator. 9. The electronic circuit as claimed in claim 1 , wherein the storage means comprises: a first capacitor, a first terminal of which is connected to the integration node and a second terminal of which is connected to a reference potential, a second switch connected between the integration node and the first terminal of the first capacitor. 10. A matrix detector composed of pixels, wherein each pixel comprises an electronic circuit as claimed in claim 1 . 11. A method implementing the electronic circuit as claimed in claim 1 , the method comprising an initialization phase, comprising the following steps: connection of an input terminal of the injection circuit to a first potential, injection of a first charge on the output terminal of the injection circuit, connection of the input terminal of the comparator, connected to the storage means for storing, to the output terminal of the comparator, storage of a difference between an equilibrium potential and a reference potential, the equilibrium potential corresponding to an output potential of the injection circuit after one or more injections of the first charge, the reference potential V ref being a fixed potential, setting of the integration node to a trigger potential, the trigger potential corresponding to a threshold of the potential of the integration node beyond which the injection circuit injects charges, connection of an input terminal of the injection circuit to a second potential, such that the injection circuit delivers a second charge as a function of the difference between the potential of the integration node and the trigger potential. 12. The method as claimed in claim 11 , wherein the initialization phase comprises the injection of a predetermined number of first charges, following which the integration node reaches an equilibrium potential. 13. The method as claimed in claim 12 , wherein the equilibrium potential corresponds to the potential at the integration node after an initialization phase, said equilibrium potential then constituting the trigger potential, below or beyond which the injection circuit delivers a second charge. 14. The method as claimed in claim 11 , wherein said potential difference between said equilibrium potential and the reference potential is stored at the terminals of a link capacitor, said capacitor being arranged between the integration node of the detector and the second input of the comparator.
by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance · CPC title
Addressed sensors, e.g. MOS or CMOS sensors · CPC title
with semiconductor detectors · CPC title
by repetitive charge or discharge of a capacitor, analogue generators · CPC title
Electricity · mapped topic
Related publications grouped by family.
Answers are generated from the same data shown on this page.