Semiconductor memory device and method for manufacturing same

Patent metadata

Field	Value
Publication number	US-9847342-B2
Application number	US-201615268126-A
Country	US
Kind code	B2
Filing date	Sep 16, 2016
Priority date	Mar 14, 2016
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

A semiconductor memory device includes a first structural body, a second structural body and interconnections. The first and the second structural bodies are separated in a first direction and extend in a second direction. The interconnections are provided between the first structural body and the second structural body, extend in the second direction, and are separated from each other along a third direction. The first and the second structural bodies each includes an insulating member, a column-shaped body and an insulating film. The insulating member and the column-shaped body are disposed in an alternating manner along the second direction and extend in the third direction. The insulating members of the first and second structural bodies make contact with the interconnections.

First claim

What is claimed is:

1. A semiconductor memory device comprising:
a first structural body and a second structural body separated in a first direction and extending in a second direction intersecting with the first direction; and
a plurality of interconnections, provided between the first structural body and the second structural body, extending in the second direction, and separated from each other along a third direction intersecting with a plane including the first direction and the second direction,
the first structural body and the second structural body each including:
an insulating member and a column-shaped body disposed in an alternating manner along the second direction and extending in the third direction; and
an insulating film provided between the column-shaped body and the plurality of interconnections,
the column-shaped body including:
a first semiconductor member and a second semiconductor member separated from each other along the first direction and extending in the third direction; and
an electrode provided between the first semiconductor member and each of the plurality of interconnections, and

the insulating member of the first structural body and the insulating member of the second structural body making contact with the plurality of interconnections.

2. The semiconductor memory device according to claim 1 , wherein one of the plurality of interconnections makes contact with both the insulating member of the first structural body and the insulating member of the second structural body.

3. The semiconductor memory device according to claim 1 , further comprising:
a second interconnection connected to the first semiconductor member; and
a third interconnection connected to the second semiconductor member.

4. The semiconductor memory device according to claim 1 , wherein the insulating film is also disposed between the column-shaped body and the insulating member.

5. A semiconductor memory device comprising:
a first interconnection and a second interconnection separated in a first direction and extending in a second direction intersecting with the first direction;
a first insulating member and a second insulating member, provided between the first interconnection and the second interconnection, separated from each other along the second direction, and extending in a third direction intersecting with a plane including the first direction and the second direction;
a semiconductor member provided between the first insulating member and the second insulating member;
a first electrode provided between the semiconductor member and the first interconnection;
a second electrode provided between the semiconductor member and the second interconnection; and
a third insulating member disposed within the semiconductor member and linked to the first insulating member and the second insulating member.

6. The semiconductor memory device according to claim 5 , further comprising an insulating film provided between the semiconductor member and the first electrode, between the semiconductor member and the second electrode, between the semiconductor member and the first insulating member, between the semiconductor member and the second insulating member, and between the semiconductor member and the third insulating member.

7. The semiconductor memory device according to claim 5 , wherein the third insulating member does not pass through the semiconductor member in the third direction.

8. The semiconductor memory device according to claim 5 , wherein the third insulating member passes through the semiconductor member in the third direction.

9. The semiconductor memory device according to claim 5 , wherein an air gap is formed in the first insulating member.

Assignees

• Toshiba Memory Corp

Inventors

• Nagashima Satoshi
• Yamamoto Katsumi
• Sakaike Kohei
• Kato Tatsuya
• Kikutani Keisuke
• Arai Fumitaka
• Murakoshi Atsushi
• Takeuchi Shunichi
• Sekine Katsuyuki

Classifications

• H01L29/0649

  Electricity · mapped topic

• H01L29/513

  Electricity · mapped topic

• H01L21/306

  Electricity · mapped topic

• H01L27/11521

  Electricity · mapped topic

• H01L21/31

  Electricity · mapped topic