Distribution and stabilization of fluid flow for interlayer chip cooling

Patent metadata

Field	Value
Publication number	US-9847275-B2
Application number	US-201514976135-A
Country	US
Kind code	B2
Filing date	Dec 21, 2015
Priority date	Dec 21, 2015
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

A method of forming metallic pillars between a fluid inlet and outlet for two-phase fluid cooling. The method may include; forming an arrangement of metallic pillars between two structures, the metallic pillars are electrically connected to metallic connecting lines that run through each of the two structures, the arrangement of metallic pillars located between a fluid inlet and a fluid channel, the fluid channel having channel walls running between arrangements of the metallic pillars and a fluid outlet, whereby a fluid passes through the arrangement of metallic pillars to flow into the fluid channel.

First claim

What is claimed is:

1. A two-phase method for cooling semiconductor structures in a chip stack comprising:
providing a first semiconductor structure having first metallic attachments on a top surface of a first substrate and second metallic attachments on a bottom surface of the first substrate, the first metallic attachments connected to first connecting lines and the second metallic attachments connected to second connecting lines, wherein the first connecting lines and the second connecting lines are in the first substrate;
forming first metallic pillars on the second metallic attachments;
providing a second semiconductor structure having third metallic attachments on a top surface of a second substrate and fourth metallic attachments on a bottom surface of the second substrate, the third metallic attachments connected to third connecting lines and the fourth metallic attachments connected to fourth connecting lines, wherein the third connecting lines and the fourth connecting lines are in the second substrate;
forming second metallic pillars on the fourth metallic attachments;
forming an assembled semiconductor structure by bonding the first metallic pillars to the second metallic pillars using a conductive material, wherein a fluid channel separates the bottom surface of the first semiconductor structure from the bottom surface of the second semiconductor structure; and
enclosing the assembled structure within an enclosure, wherein a fluid can enter the enclosure through an inlet port, pass between the bonded metallic pillars and through the fluid channel, and exit the enclosure through an outlet port.

2. The method of claim 1 , wherein the bonded metallic pillars transfer heat from the assembled structure to the fluid, provide an electrical connection between the first semiconductor structure and the second semiconductor structure, and provide structural support for the assembled semiconductor structure.

3. The method of claim 1 , wherein the fluid enters the fluid channel from a first outer perimeter side of the assembled structure and exits the fluid channel at a second outer perimeter side of the assembled structure.

4. The method of claim 1 , wherein the fluid enters the fluid channel through the second semiconductor structure and exits the fluid channel at an outer perimeter side of the assembled structure, and wherein the fluid channels are configured in a radial arrangement.

5. The method of claim 1 , wherein the bonded metallic pillars are arranged in a non-uniform arrangement between adjacent fluid channel walls.

6. The method of claim 1 , wherein the bonded metallic pillars are arranged in a staggered arrangement between adjacent fluid channel walls.

7. The method of claim 1 , wherein the bonded metallic pillars are arranged in an inline arrangement between adjacent fluid channel walls.

8. The method of claim 1 , wherein the conductive material bonding the first metallic pillars to the second metallic pillars is solder.

9. A two-phase method for cooling semiconductor structures in a chip stack comprising:
forming metallic pillars between a first semiconductor structure and a second semiconductor structure, the metallic pillars located in a fluid channel, the fluid channel separating the first semiconductor structure and the second semiconductor structure, and a coolant flowing into the fluid channel from an inlet port and exiting from and outlet port, wherein the metallic pillars transfer heat from the first semiconductor structure and the second semiconductor structure to the coolant, provide an electrical connection between the first semiconductor structure and the second semiconductor structure, and provide structural support for the first semiconductor structure and the second semiconductor structure, wherein the metallic pillars are arranged in a non-uniform arrangement between adjacent fluid channel walls.

10. The method of claim 9 , wherein the coolant enters the fluid channel from a first outer perimeter side of the first semiconductor structure and the second semiconductor structure and exits the fluid channel at a second outer perimeter side of the first semiconductor structure and the second semiconductor structure.

11. The method of claim 9 , wherein the coolant enters the fluid channel through the second semiconductor structure and exits the fluid channel at an outer perimeter side of the first semiconductor structure and the second semiconductor structure, and wherein the fluid channels are configured in a radial arrangement.

12. The method of claim 9 , wherein the metallic pillars are arranged in a staggered arrangement between adjacent fluid channel walls.

13. The method of claim 9 , wherein the metallic pillars are arranged in an inline arrangement between adjacent fluid channel walls.

14. A structure for two-phase cooling of integrated circuits (IC's) comprising:
an enclosure;
a first semiconductor structure;
a second semiconductor structure located above the first semiconductor structure, wherein the first semiconductor structure and the second semiconductor structure are within the enclosure; and
an arrangement of metallic pillars located between the first semiconductor structure and the second semiconductor structure, wherein the arrangement of metallic pillars electrically and thermally connect the first semiconductor structure to the second semiconductor structure, the arrangement of metallic pillars located in a fluid channel separating the first semiconductor structure and the second semiconductor structure, wherein the arrangement of metallic pillars are arranged in a non-uniform arrangement between adjacent fluid channel walls, and
wherein a fluid enters the enclosure at a fluid inlet and passes between the first semiconductor structure and the second semiconductor structure through the fluid channel and exits the enclosure at a fluid outlet, the fluid cooling the arrangement of metallic pillars through a two-phase cooling process.

15. The structure of claim 14 , wherein the arrangement of metallic pillars provide structural support between the first semiconductor structure and the second semiconductor structure.

16. The structure of claim 14 , wherein the arrangement of metallic pillars are arranged in a staggered arrangement between adjacent fluid channel walls.

17. The structure of claim 14 , wherein the arrangement of metallic pillars are arranged in an inline arrangement between adjacent fluid channel walls.

18. The structure of claim 14 , wherein each metallic pillar in the arrangement of metallic pillars includes a first metallic pillar and a second metallic pillar joined by a reflowed solder.

Assignees

• IBM

Inventors

• Chainer Timothy J
• Parida Pritish R
• Yang Fanghao

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W90/288

  characterised by arrangements for thermal management of the stacked chips · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W76/10

  Containers or parts thereof · CPC title

• H10W40/73

  for cooling by change of state · CPC title