Bidirectional data transmission system

Patent metadata

Field	Value
Publication number	US-9846671-B2
Application number	US-201414577289-A
Country	US
Kind code	B2
Filing date	Dec 19, 2014
Priority date	Jun 23, 2014
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

A system for bidirectional signal transmission may comprise a forward data transmission circuit to unidirectionally transmit a first input signal and a backward data transmission circuit to unidirectionally transmit a second input signal. The backward data transmission circuit may comprises a logic circuit to detect a voltage difference over a resistance element in the forward data transmission circuit. When the voltage difference is lower than a threshold value, the logic circuit outputs a first voltage level. When the voltage difference is greater than or equal to a threshold value, the logic circuit outputs a second voltage level different from the first voltage level.

First claim

The invention claimed is:

1. A system for bidirectional signal transmission, comprising:
a forward data transmission circuit to receive a first input signal from a first input port and transmit the first input signal to a first output port; and
a backward data transmission circuit to receive a second input signal from a second input port and transmit the second input signal to a second output port, the backward data transmission circuit comprising:
a logic circuit to detect a voltage difference over a first resistance element in the forward data transmission circuit, wherein:
when the voltage difference is lower than a threshold value, the logic circuit outputs a first output voltage level, and
when the voltage difference is greater than or equal to the threshold value, the logic circuit outputs a second output voltage level different from the first output voltage level.

2. The system of claim 1 , wherein:
the first input signal is a digital signal switching between a first voltage level and a second voltage level lower than the first voltage level; and
the second input signal is a digital signal switching between a reference voltage level and a third voltage level, wherein:
the third voltage level synchronizes with the first input signal and equals to a voltage level of the first input signal, and
the reference voltage level is lower than the first voltage level and higher than the second voltage level.

3. The system of claim 2 , further comprising:
a first control circuit to detect an input voltage change from the first input port and control the logic circuit to maintain an output during the input voltage change.

4. The system of claim 3 , wherein:
the first input signal is associated with a first clock frequency,
the second input signal is associated with a second clock frequency,
the first input signal comprises a first switch time between each switch between the first voltage level and the second voltage level, and
the second input signal comprises a second switch time when switching between the reference voltage level and the third voltage level.

5. The system of claim 4 , further comprising a second control circuit to modify the second input signal, wherein
when the second clock frequency is more than ten times higher than the first clock frequency and the first switch time overlaps with the second switch time, the second control circuit holds off the second input signal and the first control circuit controls the logic circuit to maintain the output until the input voltage change of the first input signal is completed,
when a difference between the first clock frequency and the second clock frequency is smaller than one tenth of the first clock frequency, the second control circuit modifies the second clock frequency in the second input signal to the first clock frequency,
when the second clock frequency equals the first clock frequency, the second control circuit transmits the second input signal with a time delay that equals the first switch time, and
when the first clock frequency is more than ten times higher than the second clock frequency and the first switch time overlaps with the second switch time, the second control circuit holds off the second input signal and the first control circuit controls the logic circuit to maintain the output until the input voltage change of the first input signal is completed.

6. The system of claim 1 , wherein the forward data transmission circuit comprises:
a first buffer circuit connected to the first input port; and
a second buffer circuit connected to the first output port, wherein:
the first resistance element is between the first buffer circuit and the second buffer circuit, and
a first port of the first resistance element is connected to the first buffer circuit and a second port of the first resistance element is connected to the second buffer circuit.

7. The system of claim 6 , wherein:
the first buffer circuit comprises a power amplifier,
the second buffer circuit comprises a power amplifier, and
the logic circuit comprises an exclusive-OR gate.

8. The system of claim 1 , further comprising a switch connected to the second input port, the switch comprising:
a switch input port to receive a reference voltage, wherein:
the first input signal is a digital signal switching between a first voltage level and a second voltage level lower than the first voltage level, and
the reference voltage is lower than the first voltage level and higher than the second voltage level;

a switch output port connected to the first resistance element; and
a switch control port to receive a control signal.

9. The system of claim 8 , wherein
the control signal is a digital signal switching between a third voltage level and a fourth voltage level,
the switch opens when the control signal switches to the third voltage level, and
the switch closes when the control signal switches to the fourth voltage level.

10. The system of claim 8 , wherein the backward data transmission circuit further comprises a second resistance element connected to the switch in series between the switch output port and the first resistance element,
wherein the second resistance element has a greater resistance than the first resistance element so that when the reference voltage is applied to the switch input port and the first input signal is applied to the first input port, whether the switch is closed or not does not have an impact on a data transmission between the first input port and the first output port.

11. The system of claim 8 , wherein the switch input port connects to a fast response low-dropout circuit.

12. The system of claim 8 , further comprising:
a third resistance element connected to an power source;
a fourth resistance element connected to the third resistance element in series and a ground; and
a capacitor connected with the fourth resistance element in parallel between the third resistance element and the ground,
wherein the switch input port connects to a point between the capacitor and the third resistance element.

13. A method for bidirectional data transmission, comprising:
receiving, by a forward data transmission circuit, a first input signal from a first input port and transmitting the first input signal to a first output port;
receiving, by a backward data transmission circuit, a second input signal from a second input port to generate a voltage difference over a resistance element of the forward data transmission circuit;
detecting, by a logic circuit in the backward data transmission circuit, the voltage difference over the resistance element in the forward data transmission circuit, wherein:
when the voltage difference is lower than a threshold value, the logic circuit outputs a first output voltage level, and
when the voltage difference is greater than or equal to the threshold value, the logic circuit outputs a second output voltage level different from the first output voltage level; and

generating, by the backward data transmission circuit, an output signal.

14. The method of claim 13 , wherein:
the first input signal is a digital signal switching between a first voltage level and a second voltage level lower than the first voltage level, and
the second input signal is a digital signal switching between a reference voltage level and a third voltage level, wherein the third voltage level synchronizes with the first input signal and equals to a voltage level of the first input signal.

15. The method of claim 14 , wherein the reference voltage level is lower than the first voltage level and higher than

Assignees

• Qingdao Hisense Electronics Co Ltd
• Hisense Usa Corp
• Hisense Int Co Ltd

Inventors

• Sun Xuebin

Classifications

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F13/4221 Primary

  being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus · CPC title

• A61B5/742

  using visual displays (displays for heart-related electrical signals, e.g. ECG, A61B5/339) · CPC title

• A61B5/205

  Determining bladder or urethral pressure · CPC title

• G16H40/63

  for local operation · CPC title