Efficient high/low energy zone solid state device data storage

Patent metadata

Field	Value
Publication number	US-9846613-B2
Application number	US-201615006403-A
Country	US
Kind code	B2
Filing date	Jan 26, 2016
Priority date	Jan 27, 2015
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

Methods and apparatus associated with storing data in high or low energy zones are described. Example apparatus include a data storage system (DSS) that protects a message using an erasure code (EC). A location in the DSS may have an energy efficiency rating or a latency. Example apparatus include circuits that produce EC encoded data that has a likelihood of use, that select a location to store the EC encoded data in the DSS based on the energy efficiency rating, the latency, or the likelihood of use, that store the EC encoded data in the location, and that compute an order of retrieval for EC encoded data stored in the location. The order of retrieval may be based on the energy efficiency rating or the latency. The EC encoded data may also have a priority based on the number of erasures for which the EC corrects.

First claim

What is claimed is:

1. A non-transitory computer-readable storage device storing computer executable instructions that when executed by a computer control the computer to perform a method for storing data in an energy efficient manner, the method comprising:
accessing a set of data blocks;
computing a first energy rating for a member of the set of data blocks;
accessing a set of parity blocks generated from the set of data blocks;
computing a second energy rating for a member of the set of parity blocks;
computing a relative rating for a member of the set of data blocks or a member of the set of parity blocks as a function of the first energy rating and the second energy rating;
determining an efficiency rating for a storage location in a data storage device (DSD), where the efficiency rating is a function of a property of the DSD;
selecting a storage location in the DSD as a function of the relative rating and the efficiency rating; and
writing the member of the set of data blocks or the member of the set of parity blocks to the storage location.

2. The non-transitory computer-readable storage device of claim 1 , where the DSD includes a solid state device (SSD), a dynamic random access memory (DRAM), a static RAM (SRAM), a persistent, resistance-based, non-volatile cross point structure memory, a level 1 (L1) random access memory (RAM) cache, a level 2 (L2) RAM cache, or a level 3 (L3) RAM cache.

3. The non-transitory computer-readable storage device of claim 1 , where computing the first energy rating for the member of the set of data blocks includes assigning an energy rating to the member of the set of data blocks based on a block loss probability profile associated with the set of data blocks.

4. The non-transitory computer-readable storage device of claim 1 , where computing the first energy rating for the member of the set of data blocks includes assigning an energy rating to the member of the set of data blocks based on a set of data access patterns associated with the set of data blocks.

5. The non-transitory computer-readable storage device of claim 1 , where computing the first energy rating for the member of the set of data blocks includes assigning an energy rating to the member of the set of data blocks based on an access frequency associated with the member of the set of data blocks.

6. The non-transitory computer-readable storage device of claim 1 , where computing the first energy rating for the member of the set of data blocks includes assigning an energy rating to the member of the set of data blocks based on a block loss probability profile associated with the set of data blocks, a set of data access patterns associated with the set of data blocks, and an access frequency associated with the member of the set of data blocks.

7. The non-transitory computer-readable storage device of claim 1 , where the set of parity blocks is generated from the set of data blocks using a systematic erasure code, a non-systematic erasure code, a Fountain code, a Reed-Solomon (RS) code, a rate-compatible low-density parity check (LDPC) code, or a rate-compatible Turbo probabilistic code.

8. The non-transitory computer-readable storage device of claim 1 , where the property of the DSD is a capacity property, a power consumption property, a write speed property, a read speed property, or an affordability property.

9. The non-transitory computer-readable storage device of claim 1 , where the property of the DSD is based on a power consumption property of the DSD, a capacity property of the DSD, a speed property of the DSD, and an affordability property of the DSD.

10. The non-transitory computer-readable storage device of claim 1 , where a member of the set of parity blocks includes an adjacency set, where the adjacency set represents members of the set of data blocks that may be regenerated from the member of the set of parity blocks.

11. The non-transitory computer-readable storage device of claim 10 , where the second energy rating for the member of the set of parity blocks is based, at least in part, on a parity block access priority coefficient, and where the second energy rating for the member of the set of parity blocks is inversely related to the size of the adjacency set associated with the member of the set of parity blocks.

12. The non-transitory computer-readable storage device of claim 11 , where the parity block access priority coefficient is defined by:

x
/

(

n

k

)

,

where the number of data blocks in the set of data blocks for which the member of the set of parity blocks is an optimum choice from which to regenerate a data block is x;
where the length of the set of data blocks is n; and
where the number of failed data blocks in the set of data blocks is k, and
where x, n, and k are integers.

13. The non-transitory computer-readable storage device of claim 12 , where the second energy rating for the member of the set of parity blocks is computed using a weighted sum of parity block access coefficients, where a first weight w 1 and a second weight w 2 are a function of a data loss probability associated with a member of the adjacency set associated with the member of the set of parity blocks, where w 1 +w 2 =1.

14. The non-transitory computer-readable storage device of claim 13 , where the relative rating of a member of the set of data blocks and a member of the set of parity blocks is defined by:

∑

i
=
1

d

⁢

p
c

⁢

r
i

+

∑

i
=

d
+
1

y

⁢

(

1
-

p
c

)

⁢

r
i

where d is the number of data blocks in the set of data blocks;
y is the number d of data blocks in the set of data blocks plus the number of parity blocks in the set of parity blocks;
p c is the probability that there are no data block failures among the set of data blocks within a threshold period of time; and
r j is a fi

Assignees

• Quantum Corp

Inventors

• Arslan Suayb
• Goker Turguy

Classifications

• G06F11/1008 Primary

  in individual solid state devices (G06F11/1004 takes precedence) · CPC title

• G11B20/1217

  on discs · CPC title

• G11B20/1833

  by adding special lists or symbols to the coded information (G11B20/1806, G11B20/1866 take precedence) · CPC title

• G06F1/266

  Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title