Write-erase endurance lifetime of memory storage devices
US-9776673-B2 · Oct 3, 2017 · US
US9846542B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9846542-B2 |
| Application number | US-201514682200-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 9, 2015 |
| Priority date | Apr 15, 2014 |
| Publication date | Dec 19, 2017 |
| Grant date | Dec 19, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A storage controller that improves performance of a storage device by reducing the number of data I/O operations. The storage controller, as part of a storage device and a storage system, and in a method of operating the storage controller, includes a host interface receiving data requested for storage from a host and lifetime information indicating a change period of the data, and a data placement manager determining a storage position of the data in a flash memory based on the lifetime information of the data.
Opening claim text (preview).
What is claimed is: 1. A storage controller comprising: a host interface configured to receive data requested for storage from a host, and receive lifetime information indicating a change period of the data; and a data placement manager configured to determine a storage position of the data in a flash memory based on the lifetime information of the data. 2. The storage controller of claim 1 , wherein the lifetime information includes lifetime grades produced by classifying the change period of the data into N grades, where N is a natural number, according to a length of the change period, and wherein the data placement manager is configured to determine a storage position of first data pieces from among the data having a same lifetime grade in a corresponding memory block. 3. The storage controller of claim 2 , wherein the lifetime grades are determined as absolute grades of 1 to N. 4. The storage controller of claim 3 , wherein the lifetime grades are determined such that second data pieces from among the data having a longer lifetime have a higher lifetime grade than other data pieces from among the data. 5. The storage controller of claim 3 , wherein the lifetime grades further include a permanent lifetime grade for second data pieces from among the data that permanently exist in the flash memory. 6. The storage controller of claim 2 , wherein lifetime grades of data pieces from among the data are determined relative to lifetime grades of other data pieces from among the data. 7. The storage controller of claim 1 , wherein the data placement manager is configured to determine a storage position of first data pieces from among the data having a relatively short lifetime as compared to a lifetime of other data pieces from among the data as placed at a place in the flash memory having a relatively smaller wear-leveling count than other places in the flash memory. 8. The storage controller of claim 1 , wherein the flash memory includes a first storage position and a second storage position, and when a lifetime of the first storage position is shorter than a lifetime of the second storage position, a garbage collection operation is preferentially performed on the first storage position. 9. The storage controller of claim 1 , wherein when the lifetime information of the data stored in the flash memory is changed to provide changed lifetime information, the data placement manager is configured to again determine the storage position of the data based on the changed lifetime information. 10. The storage controller of claim 9 , wherein the flash memory includes a first memory block and a second memory block, and when the lifetime information of the data stored in the first memory block is changed to provide the changed lifetime information, the data is migrated to the second memory block. 11. The storage controller of claim 9 , wherein the changed lifetime information is received from the host. 12. The storage controller of claim 1 , further comprising a lifetime estimator configured to estimate a lifetime of the data received from the host, and transmit the estimated lifetime to the data placement manager as the lifetime information. 13. The storage controller of claim 12 , wherein the lifetime estimator is configured to re-estimate the lifetime of the data according to at least one of a snapshot, clone and deduplication operation. 14. The storage controller of claim 12 , wherein the lifetime estimator is configured to use a Heuristic method to estimate the lifetime of the data. 15. The storage controller of claim 1 , further comprising a metadata management unit configured to manage metadata indicating a relationship between the data and the lifetime information. 16. A storage device comprising: a flash memory including a single level cell (SLC) memory module and a multiple level cell (MLC) memory module; a flash memory interface configured to interface with the flash memory; a host interface configured to receive data requested for storage from a host, and receive lifetime information indicating a change period of the data; and a data placement manager configured to determine a storage position of the data in the flash memory within the SLC memory module and the MLC memory module based on the lifetime information of the data. 17. The storage device of claim 16 , wherein when a lifetime of the data exceeds a predetermined threshold value, the data placement manager determines the MLC memory module as the storage position of the data. 18. The storage device of claim 16 , wherein an endurance of the MLC memory module is higher than an endurance of the SLC memory module. 19. The storage device of claim 18 , wherein the endurance of the SLC memory module and the endurance of the MLC memory module are measured based on a maximum number of data I/O operations of memory cells within the SLC memory module and the MLC memory module. 20. The storage device of claim 18 , wherein a lifetime of first data pieces from among the data that is stored in the SLC memory module is shorter than a lifetime of second data pieces from among the data that is stored in the MLC memory module. 21. The storage device of claim 16 , wherein the MLC memory module includes at least one of a triple level cell (TLC) and a quad level cell (QLC). 22. A storage system comprising: a plurality of storage devices; and a controller configured to control the plurality of storage devices, the controller comprising a host interface configured to receive data requested for storage from a host, and receive lifetime information indicating a change period of the data, and a data placement manager configured to determine a storage position of the data in a flash memory among the plurality of storage devices based on the lifetime information of the data. 23. The storage system of claim 22 , wherein each of the plurality of storage devices include a first storage device including a memory cell of a first type and a second storage device including a memory cell of a second type different from the first type, and wherein an endurance of the first storage device is higher than an endurance of the second storage device. 24. The storage system of claim 23 , wherein a lifetime of first data pieces from among the data that is stored in the first storage device is shorter than a lifetime of second data pieces from among the data that is stored in the second storage device. 25. The storage system of claim 22 , further comprising a cache memory configured to cache the data stored in the plurality of storage devices, wherein the controller is configured to load the data stored in the plurality of storage devices to the cache memory. 26. The storage system of claim 25 , wherein the plurality of storage devices include a first storage device and a second storage device, a data I/O rate of the second storage device is lower than a data I/O rate of the first storage device, and a lifetime of first data pieces from among the data that is stored in the first storage device is shorter than a lifetime of second data pieces from among the data that is stored in the second storage device. 27. The storage system of claim 26 , wherein when access frequencies to the second data pieces stored in the second storage device per unit time exceed a predetermined threshold value, the controller is configured to load the second data pieces having the access fr
Wear leveling · CPC title
in relation to life time, e.g. increasing Mean Time Between Failures [MTBF] · CPC title
Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices · CPC title
Cleaning, compaction, garbage collection, erase control · CPC title
Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.