Array substrate, touch display panel and touch display device

Patent metadata

Field	Value
Publication number	US-9846325-B2
Application number	US-201514927389-A
Country	US
Kind code	B2
Filing date	Oct 29, 2015
Priority date	May 8, 2015
Publication date	Dec 19, 2017
Grant date	Dec 19, 2017

Abstract

An array substrate, a touch display panel and a touch display device. The array substrate includes: a substrate; a pixel electrode layer; a common electrode layer, which comprises a plurality of common electrode blocks, wherein the common electrode blocks are operable as touch electrodes; a wiring layer, comprises a plurality of wirings, wherein each of the wirings is electrically connected with a corresponding one of the common electrode blocks, and at least one wiring is each overlapped with at least one common electrode block electrically insulated therefrom; and first bridge structures and auxiliary electrodes disposed in the pixel electrode layer, wherein each first bridge structure is configured for a connection between the wiring and the common electrode block, and each auxiliary electrode is connected with one of the wirings and disposed above the common electrode block insulated from and overlapped with the wiring.

First claim

We claim:

1. An array substrate, comprising:
a substrate;
a pixel electrode layer, which is disposed on the substrate and comprises a plurality of pixel electrodes spaced from each other and arranged in an array;
a common electrode layer, which is disposed at a side of the pixel electrode layer close to the substrate and comprises a plurality of common electrode blocks spaced from each other and arranged in an array, wherein the common electrode blocks are operable as touch electrodes;
a wiring layer, which is disposed at a layer different from the pixel electrode layer and comprises a plurality of wirings, wherein each of the wirings is electrically connected with a corresponding one of the common electrode blocks but is electrically insulated from other common electrode blocks, and at least one wiring is each overlapped with at least one common electrode block electrically insulated therefrom; and
first bridge structures and auxiliary electrodes disposed in the pixel electrode layer, wherein each first bridge structure is disposed at and configured for connection between the wiring and the common electrode block corresponding to the wiring, and each auxiliary electrode is connected with one of the wirings and disposed above the common electrode block insulated from and overlapped with the wiring.

2. The array substrate of claim 1 , wherein, the first bridge structures, the auxiliary electrodes and the pixel electrodes are made of the same material in the same process.

3. The array substrate of claim 1 , wherein, the wiring layer is located at a side of the common electrode layer close to the substrate.

4. The array substrate of claim 1 , wherein, the wiring layer is located between the common electrode layer and the pixel electrode layer.

5. The array substrate of claim 1 , wherein, the wiring layer is disposed at the same layer as the common electrode layer.

6. The array substrate of claim 1 , wherein, the wiring is extended along a column of the common electrode blocks, and overlapped with at least a portion of the common electrode blocks in the column of common electrode blocks.

7. The array substrate of claim 6 , wherein, the wiring is overlapped with all common electrode blocks in the column of common electrode blocks.

8. The array substrate of claim 6 , further comprising a dummy conductive wiring segment, wherein the dummy conductive wiring segment is located at the same line as the wiring and is disposed in a region of the common electrode block insulated from but not overlapped with the wiring.

9. The array substrate of claim 8 , wherein, the dummy conductive wiring segment is electrically connected with the common electrode block corresponding to the dummy conductive wiring segment by the first bridge structure.

10. The array substrate of claim 1 , further comprising a plurality of data lines and a plurality of scanning lines, wherein the wirings are parallel to either the data lines or the scanning lines.

11. The array substrate of claim 10 , wherein an orthographic projection of the wiring onto the array substrate is located within an orthographic projection of either the data line or the scanning line onto the array substrate.

12. The array substrate of claim 1 , wherein, a sum of the first bridge structures and the auxiliary electrodes both connected with each common electrode block is identical.

13. A touch display panel, comprising:
an array substrate;
a color filter substrate disposed opposite to the array substrate, and
a liquid crystal layer disposed between the array substrate and the color filter substrate, wherein
the array substrate comprises:
a substrate;
a pixel electrode layer, which is disposed on the substrate and comprises a plurality of pixel electrodes spaced from each other and arranged in an array;
a common electrode layer, which is disposed at a side of the pixel electrode layer close to the substrate and comprises a plurality of common electrode blocks spaced from each other and arranged in an array, wherein the common electrode blocks are operable as touch electrodes;
a wiring layer, which is disposed at a layer different from the pixel electrode layer and comprises a plurality of wirings, wherein each of the wirings is electrically connected with a corresponding one of the common electrode blocks but is electrically insulated from other common electrode blocks, and at least one wiring is each overlapped with at least one common electrode block electrically insulated therefrom; and
first bridge structures and auxiliary electrodes disposed in the pixel electrode layer, wherein each first bridge structure is disposed at and configured for a connection between the wiring and the common electrode block corresponding to the wiring, and each auxiliary electrode is connected with one of the wirings and disposed above the common electrode block insulated from and overlapped with the wiring.

14. The touch display panel of claim 13 , wherein, the color filter substrate is provided with a black matrix, and orthographic projections of the plurality of wirings of the array substrate onto the array substrate is located within an orthographic projection of the black matrix onto the array substrate.

15. A touch display device, comprising a touch display panel and a drive chip configured for driving the touch display panel in a display phase and a touch sensing phase, wherein
the touch display panel comprises:
an array substrate;
a color filter substrate disposed opposite to the array substrate, and
a liquid crystal layer disposed between the array substrate and the color filter substrate, wherein
the array substrate comprises:
a substrate;
a pixel electrode layer, which is disposed on the substrate and comprises a plurality of pixel electrodes spaced from each other and arranged in an array;
a common electrode layer, which is disposed at a side of the pixel electrode layer close to the substrate and comprises a plurality of common electrode blocks spaced from each other and arranged in an array, wherein the common electrode blocks are operable as touch electrodes;
a wiring layer, which is disposed at a layer different from the pixel electrode layer and comprises a plurality of wirings, wherein each of the wirings is electrically connected with a corresponding one of the common electrode blocks but is electrically insulated from other common electrode blocks, and at least one wiring is each overlapped with at least one common electrode block electrically insulated therefrom; and
first bridge structures and auxiliary electrodes disposed in the pixel electrode layer, wherein each first bridge structure is disposed at and configured for a connection between the wiring and the common electrode block corresponding to the wiring, and each auxiliary electrode is connected with one of the wirings and disposed above the common electrode block insulated from and overlapped with the wiring.

Assignees

• Shanghai Tianma Microelectronics Co Ltd
• Tianma Microelectronics Co Ltd

Inventors

• Yu Quanpeng
• Yuan Yong
• Wei Danping

Classifications

• G02F1/134363

  for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS] · CPC title

• G06F3/0412

  Digitisers structurally integrated in a display · CPC title

• G06F3/044

  by capacitive means · CPC title

• G02F1/13338 Primary

  Input devices, e.g. touch panels · CPC title

• G02F2001/134318

  Physics · mapped topic