3d stacked piezoresistive pressure sensor
US-2016320255-A1 · Nov 3, 2016 · US
US9846096B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9846096-B2 |
| Application number | US-201615082472-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 28, 2016 |
| Priority date | Apr 9, 2015 |
| Publication date | Dec 19, 2017 |
| Grant date | Dec 19, 2017 |
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Electrical and mechanical noise in a microelectromechanical system (MEMS) pressure sensor are reduced by the symmetrical distribution of bond pads, conductive vias and interconnects and by the elimination of bond wires used in the prior art to connect a MEMS pressure sensing element to an application specific integrated circuit (ASIC). The bond wires are eliminated by using conductive vias to connect an ASIC to a MEMS pressure sensing element. Extraneous electrical noise is suppressed by conductive rings that surround output signal bond pads and a conductive loop that surrounds the conductive rings and bond pads. The conductive rings and loop are connected to a fixed voltage or ground potential.
Opening claim text (preview).
What is claimed is: 1. A microelectromechanical system (MEMS) pressure sensing element comprising: a first silicon substrate having a top surface having a plurality of bond pads, which are symmetrically distributed on the top surface; and a conductive loop carrying a fixed voltage and which circumscribes the plurality of bond pads, the conductive loop being symmetrically distributed on the top surface. 2. The MEMS pressure sensing element of claim 1 , wherein at least one of the bond pads is circumscribed by a conductive ring carrying a second fixed voltage. 3. The MEMS pressure sensing element of claim 2 , wherein the conductive ring and bond pads are vertically separated from each other by a dielectric. 4. The MEMS pressure sensing element of claim 1 , wherein the first silicon substrate has an opposing bottom surface, the first silicon substrate further comprising conductive vias, which extend through the first silicon substrate from the bond pads to the bottom surface. 5. The MEMS pressure sensing element of claim 4 , further comprising a second silicon substrate having a top surface and an opposing bottom surface, the top surface of the second silicon substrate having a recess and having conductive vias that extend between the top and bottom surfaces of the second silicon substrate, the top surface of the second substrate being attached to the bottom surface of the first silicon substrate, the conductive vias through the second silicon substrate being aligned with and electrically connected to conductive vias that extend through the first silicon substrate. 6. The MEMS pressure sensing element of claim 5 , wherein the recess is substantially evacuated. 7. The MEMS pressure sensing element of claim 5 , further comprising a third substrate, which is electrically connected to at least one of the first silicon substrate and the second silicon substrate by conductive paths that reside in the third substrate. 8. The MEMS pressure sensing element of claim 7 , further comprising a housing having a pocket, configured to receive and enclose the first silicon substrate, the second silicon substrate and at least partially enclose the third substrate. 9. The MEMS pressure sensing element of claim 8 , further comprising a gel covering the MEMS pressure sensing element in the pocket. 10. The MEMS pressure sensing element of claim 4 , further comprising a second silicon substrate having a top surface and an opposing bottom surface, the top surface of the second silicon substrate having a recess and conductive vias that extend between the top and bottom surfaces of the second silicon substrate, the top surface of the second substrate being attached to the bottom surface of the first silicon substrate, the conductive vias through the second silicon substrate being aligned with conductive vias that extend through the silicon substrate, the second silicon substrate additionally having a hole that extends from the bottom surface of the second silicon substrate to the recess, the hole being configured to allow a fluid to pass through the hole and into the recess. 11. The MEMS pressure sensing element of claim 10 , further comprising a third substrate, which is electrically connected to at least one of the first silicon substrate and the second silicon substrate by conductive paths that reside in the third substrate. 12. The MEMS pressure sensing element of claim 11 , further comprising a housing having a pocket, which is configured to receive and at least partially enclose the first silicon substrate, the second silicon substrate and at least partially enclose the third silicon substrate. 13. A MEMS pressure sensor comprising: a first silicon substrate having a piezoresistive bridge formed in a top surface having a plurality of bond pads, the bond pads being symmetrically distributed on the top surface and around the piezoresistive bridge, the plurality of bond pads and piezoresistive bridge being circumscribed by a loop carrying a fixed voltage, the loop being symmetrically distributed on the top surface, the first silicon substrate additionally comprising conductive vias that extend through the first silicon substrate between the bond pads and the bottom surface; a second silicon substrate having a top surface and an opposing bottom surface, the top surface of the second silicon substrate having a recess and conductive vias that extend between the top and bottom surfaces of the second silicon substrate, the top surface of the second substrate being attached to the bottom surface of the first silicon substrate, the conductive vias through the second silicon substrate being aligned with conductive vias that extend through the first silicon substrate; and a third silicon substrate, which is mechanically coupled to the bottom of the second silicon substrate, the third silicon substrate comprising electronic circuitry, which processes signals output from the first silicon substrate, the third silicon substrate comprising conductive vias that extend at least part way through the second silicon substrate between the conductive vias in the first silicon substrate and the electronic circuitry in the third silicon substrate. 14. The MEMS pressure sensor of claim 13 , wherein at least one of the bond pads is circumscribed by a conductive ring carrying a second fixed voltage. 15. The MEMS pressure sensor of claim 14 , wherein the first and second voltages are substantially the same, wherein the loop carrying a first fixed voltage and the conductive ring carrying a second fixed voltage are substantially coplanar, the substantially co-planar conductive loop and conductive ring being vertically separated from the bond pads by a distance equal to a thickness of a dielectric located between the substantially co-planar conductive loop and conductive ring and the bond pads. 16. The MEMS pressure sensor of claim 15 , wherein the recess is substantially evacuated. 17. The MEMS pressure sensor of claim 14 , further comprising a fourth silicon substrate having electronic circuitry, which is connected to the electronic circuitry in the third silicon substrate with conductive vias. 18. The MEMS pressure sensor of claim 13 , further comprising a housing having a pocket, which is configured to receive and enclose the first, second and third silicon substrates. 19. The MEMS pressure sensor of claim 18 , further comprising a gel covering the first, second and third silicon substrates in the pocket. 20. The MEMS pressure sensor of claim 18 , wherein the housing comprises a lead frame that extends from outside the housing into the pocket, wherein a portion of the lead frame in the pocket is electrically connected to the circuitry in at least one of the first, second and third silicon substrates by conductive vias. 21. The MEMS pressure sensor of claim 20 , wherein the lead frame connects to a circuit board having conductive traces on a surface thereof.
between stacked chips · CPC title
of piezo-resistive devices · CPC title
Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms (details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively) · CPC title
Details about the circuit board integration, e.g. integrated with the diaphragm surface or encapsulation · CPC title
using isolation membranes (G01L13/026 and G01L19/0645 take precedence) · CPC title
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