Pogo pin integrated circuit package mount

Patent metadata

Field	Value
Publication number	US-9844144-B1
Application number	US-201615231018-A
Country	US
Kind code	B1
Filing date	Aug 8, 2016
Priority date	Aug 8, 2016
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

Apparatuses, systems and methods associated with electrical fast transient tolerant input/output (I/O) communication (e.g., universal serial bus (USB)) design are disclosed herein. In embodiments, an apparatus to mount an integrated circuit (IC) package, may include a printed circuit board (PCB), a plurality of pogo pins, and a mounting mechanism. The plurality of pogo pins may be mounted to electrical contacts of the PCB, the plurality of pogo pins may be coupled to the electrical contacts at first ends of the plurality of pogo pins and may be to couple to the IC package at second ends of the plurality of pogo pins. The mounting mechanism may position the IC package on the second ends of the plurality of pogo pins. Other embodiments may be described and/or claimed.

First claim

What is claimed is:

1. An apparatus to mount an integrated circuit (IC) package, comprising:
a printed circuit board (PCB);
a plurality of pogo pins mounted to electrical contacts of the PCB, the plurality of pogo pins coupled to the electrical contacts at first ends of the plurality of pogo pins and to couple to the IC package at second ends of the plurality of pogo pins; and
a mounting mechanism to position the IC package on the second ends of the plurality of pogo pins and, wherein the mounting mechanism includes:
a mounting plate to position the IC package on the second ends of the plurality of pogo pins and to maintain a compression force between the IC package and the PCB; and
one or more mounting extensions to couple the mounting plate to the PCB, wherein the one or more mounting extensions are to maintain a distance between the mounting plate and the PCB, and wherein the distance is selected to cause the compression force.

2. The apparatus of claim 1 , wherein the compression force is sufficient to compress the plurality of pogo pins.

3. The apparatus of claim 1 , wherein the mounting mechanism includes:
one or more surface-mount (SMT) fixtures mounted to the PCB, wherein the one or more mounting extensions are to be affixed to the one or more SMT fixtures to couple the mounting plate to the PCB.

4. The apparatus of claim 3 , wherein the one or more mounting extensions are one or more screws, and wherein the one or more SMT fixtures each have a threaded aperture to receive one of the one or more screws.

5. The apparatus of claim 3 , wherein the mounting plate has a recess formed in a side of the mounting plate, and wherein the recess is to receive the IC package and maintain a position of the IC package relative to the mounting plate.

6. The apparatus of claim 1 , wherein the mounting mechanism includes:
a back plate positioned on an opposite side of the PCB from the mounting plate, wherein the one or more mounting extensions are to be affixed to the back plate to couple the mounting plate to the PCB.

7. The apparatus of claim 6 , wherein the mounting plate has a recess formed in a side of the mounting plate, and wherein the recess is to receive the IC package and maintain a position of the IC package relative to the mounting plate.

8. The apparatus of claim 1 , wherein the IC package includes a ball grid array (BGA), and wherein solder balls of the BGA are positioned on the second ends of the plurality of pogo pins by the mounting mechanism.

9. The apparatus of claim 1 , wherein the second ends of the plurality of pogo pins are coated with a non-corrosive material.

10. The apparatus of claim 9 , wherein the non-corrosive material is a non-gold, electrically conductive material.

11. The apparatus of claim 1 , wherein:
the IC package includes a ball grid array (BGA); and
the apparatus further comprises a land grid array (LGA) interposer to electrically couple the IC package to the plurality of pogo pins, the LGA interposer positioned between the IC package and the plurality of pogo pins, wherein electrical contacts of the IC package are coupled to a first set of electrical contacts on a first side of the LGA interposer via the BGA, and wherein a second set of electrical contacts on a second side of the LGA, opposite the first side, is coupled to the second ends of the plurality of pogo pins.

12. A computer system, comprising:
a printed circuit board (PCB);
a plurality of pogo pins mounted to the PCB, first ends of the plurality of pogo pins coupled to electrical contacts of the PCB;
an integrated circuit (IC) package positioned on the plurality of pogo pins, electrical contacts of the IC package coupled to second ends of the plurality of pogo pins; and
a mounting mechanism that mounts the IC package to the PCB with the plurality of pogo pins located between the IC package and the PCB, wherein the mounting mechanism compresses the plurality of pogo pins between the IC package and the PCB, and wherein the mounting mechanism includes:
a mounting plate to position the IC package on the plurality of pogo pins and maintain compression between the IC package and the PCB, wherein the IC package is located between the mounting plate and the PCB; and
one or more mounting extensions that couple the mounting plate to the PCB and maintain a position of the mounting plate, wherein the position of the mounting plate causes the compression between the IC package and the PCB.

13. The computer system of claim 12 , wherein the mounting mechanism includes:
one or more surface mount (SMT) fixtures affixed to the PCB, wherein the mounting extensions extend between the one or more SMT fixtures and the mounting plate.

14. The computer system of claim 13 , wherein the one or more mounting extensions include one or more screws, and wherein the one or more SMT fixtures each include a threaded aperture that receives one of the one or more screws.

15. The computer system of claim 13 , wherein the mounting plate has a recess formed in a side of the mounting plate located toward the PCB, wherein the IC package resides, at least partially, within the recess.

16. The computer system of claim 12 , wherein the mounting mechanism includes:
a back plate positioned on a side of the PCB opposite from the IC package, wherein the one or more mounting extensions affix the mounting plate to the back plate.

17. The computer system of claim 16 , wherein the mounting plate has a recess formed in a side of the mounting plate located toward the PCB, wherein the IC package resides, at least partially, within the recess.

18. The computer system of claim 16 , wherein the one or more mounting extensions extend through one or more apertures formed in the PCB.

19. The computer system of claim 12 , wherein the IC package includes a ball grid array (BGA), wherein the electrical contacts of the IC package are coupled to the second ends of the plurality of pogo pins via the BGA.

20. The computer system of claim 12 , wherein the IC package includes:
a semiconductor package with a ball grid array (BGA) on a side of the semiconductor package; and
a land grid array (LGA) interposer located on the side of the semiconductor package, the LGA interposer coupled, on a first side of the LGA interposer, to the semiconductor package by the BGA and coupled, on a second side of the LGA interposer opposite the first side, to the plurality of pogo pins, wherein the LGA interposer is to convey signals between the semiconductor package and the plurality of pogo pins.

Assignees

• Intel Corp

Inventors

• Al-Momani Emad
• Mumbo Jack
• Mothukuri Srikanth

Classifications

• H05K2201/10318

  Surface mounted metallic pins · CPC title

• H05K2201/10719

  Land grid array [LGA] · CPC title

• H05K2201/1056

  Metal over component, i.e. metal plate over component mounted on or embedded in PCB · CPC title

• H05K2201/10378

  Interposers · CPC title

• H05K2201/10734

  Ball grid array [BGA]; Bump grid array · CPC title