Digital variable capacitance circuit, resonant circuit, amplification circuit, and transmitter

Patent metadata

Field	Value
Publication number	US-9843344-B2
Application number	US-201615187608-A
Country	US
Kind code	B2
Filing date	Jun 20, 2016
Priority date	Aug 26, 2015
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

The present invention aims to provide a digital variable capacitance circuit, a resonant circuit, an amplification circuit, and a transmitter having a high performance. A digital variable capacitance circuit 50 according to this embodiment is a digital variable capacitance circuit including a plurality of unit capacity cells 51 - 0 to 51 - n connected in parallel between two output terminals OUTP and OUTN, in which the unit capacity cell 51 comprises: a first capacitor Cu 1 having one end connected to one output terminal OUTP; a second capacitor Cu 2 that is connected in series with the first capacitor Cu 1 between the two output terminals; and an NMOS transistor M 1 that is connected in parallel with the second capacitor Cu 2 and is controlled in accordance with a digital control signal.

First claim

What is claimed is:

1. A digital variable capacitance element, comprising
a plurality of capacity cells that are connected in parallel between two output terminals, wherein one of the capacity cells comprises:
a first capacitor having one end connected to one of the two output terminals;
an impedance element that is connected in series with the first capacitor between the two output terminals;
a transistor that is connected in parallel with the impedance element and is controlled in accordance with a digital control signal;
a bias voltage supply terminal that is supplied with a bias voltage;
a transmission gate connecting the bias voltage supply terminal to another end of the first capacitor and to a drain terminal of the transistor;
a control input terminal connected to a gate terminal of the transistor and to the transmission gate; and
a NOT circuit located between the transmission gate and the gate terminal of the transistor,

wherein the transmission gate is connected to an output of the NOT circuit, and the control terminal is connected to an input of the NOT circuit.

2. The digital variable capacitance circuit according to claim 1 , wherein the impedance element comprises a second capacitor.

3. The digital variable capacitance circuit according to claim 1 , further comprising:
a switch comprising the transmission gate that supplies the bias voltage to an intermediate terminal between the first capacitor and the impedance element in accordance with the digital control signal; and
a resistor arranged between the intermediate terminal and the bias voltage supply terminal.

4. The digital variable capacitance circuit according to claim 1 , wherein the one of capacity cells further comprises a third capacitor,
wherein the first capacitor, the impedance element, and the third capacitor are connected in series in this order between the two output terminals, and
wherein a differential operation is performed by the two output terminals.

5. The digital variable capacitance circuit according to claim 4 , further comprising:
a switch comprising the transmission gate that supplies the bias voltage to first and second intermediate terminals in accordance with the digital control signal;
a first resistor that is arranged between the first intermediate terminal and the bias voltage supply terminal; and
a second resistor that is connected between the second intermediate terminal and the bias voltage supply terminal,
wherein the first intermediate terminal comprises an intermediate terminal between the first capacitor and the impedance element, and
wherein the second intermediate terminal comprises an intermediate terminal between the third capacitor and the impedance element.

6. A balm resonant circuit, comprising:
the digital variable capacitance circuit according to claim 1 ;
a first inductor; and
a second inductor that is coupled with the first inductor,
wherein the digital variable capacitance circuit is connected in parallel with one of the first inductor and the second inductor.

7. A serial resonant circuit, comprising:
the digital variable capacitance circuit according to claim 1 ; and
an inductor that is connected in series with the digital variable capacitance circuit.

8. A parallel resonant circuit, comprising:
the digital variable capacitance circuit according to claim 1 ; and
an inductor that is connected in parallel with the digital variable capacitance circuit.

9. An oscillation circuit that uses the parallel resonant circuit according to claim 8 as a load.

10. An amplification circuit, comprising:
the balun resonant circuit according to claim 6 .

11. A transmitter comprising the digital variable capacitance circuit according to claim 1 .

12. The amplification circuit according to claim 10 , further comprising:
an inductor that is connected in series with the digital variable capacitance circuit; and
another inductor that is connected in parallel with the digital variable capacitance circuit.

13. The digital variable capacitance circuit according to claim 1 , wherein a positive control terminal of the transmission gate is connected to the output of the NOT circuit.

14. The digital variable capacitance circuit according to claim 13 , wherein a negative control terminal of the transmission gate is connected to the control input terminal.

15. The digital variable capacitance circuit according to claim 3 , wherein the bias voltage supply terminal is connected to the intermediate terminal via the transmission gate and the resistor.

16. The digital variable capacitance circuit according to claim 5 , wherein the bias voltage supply terminal is connected to the first intermediate terminal via the transmission gate and the first resistor.

17. The digital variable capacitance circuit according to claim 16 , wherein an output of the transmission gate is connected to the second intermediate terminal via the second resistor.

18. The digital variable capacitance circuit according to claim 17 , wherein the bias voltage supply terminal is connected to a source terminal of the transistor via the transmission gate and the second resistor.

19. The digital variable capacitance circuit according to claim 18 , wherein a positive control terminal of the transmission gate is connected to the output of the NOT circuit, and a negative control terminal of the transmission gate is connected to the control terminal.

20. The digital variable capacitance circuit according to claim 19 , wherein the negative control terminal of the transmission gate is further connected to the gate terminal of the transistor.

Assignees

• Renesas Electronics Corp

Inventors

• Mizokami Masakazu

Classifications

• H04B1/04 Primary

  Circuits · CPC title

• H03F2200/243

  A series resonance being added in series in the input circuit, e.g. base, gate, of an amplifier stage · CPC title

• H03F2200/237

  A parallel resonance being added in series in the input circuit, e.g. base, gate, of an amplifier stage · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03H11/481

  Simulating capacitances · CPC title