Phase leg arrangements for multilevel active rectifiers

US9843270B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9843270-B2
Application numberUS-201514595923-A
CountryUS
Kind codeB2
Filing dateJan 13, 2015
Priority dateJan 13, 2015
Publication dateDec 12, 2017
Grant dateDec 12, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A multilevel rectifier includes an input lead, a switching module, and a multilevel direct current (DC) link. The switching module includes a plurality of switch devices connected to the input lead. The multilevel DC link includes a positive lead, a midpoint lead, and a negative lead. each connected to the switching module. The plurality of switching module switch devices are operatively connected between the input lead and the DC link to provide a greater number of output voltage levels than the number of leads in the DC link with unidirectional power flow capability.

First claim

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What is claimed is: 1. A multilevel rectifier, comprising: an input lead; a switching module with a plurality of switch devices connected to the input lead; and a multilevel direct current (DC) link with a positive lead, a midpoint lead, and a negative lead each connected to the switching module, wherein the plurality of switch devices are operatively connected between the input lead and the multilevel DC link; wherein the plurality of switch devices includes a first switch and a second switch, wherein the first and second switches are in parallel with one another and in series between the multilevel DC link and the input lead, wherein the switching module further includes a third switch connected in series between both the first and second switches and the midpoint lead, wherein the third switch includes a first diode leg, a second diode leg, and a MOSFET device, wherein the first and second diode legs are arranged in parallel with one another, and wherein the MOSFET device is connected between the first and second diode legs. 2. The multilevel rectifier as recited in claim 1 , wherein the switching module further includes a switching module capacitor connected between the first and second switches. 3. The multilevel rectifier as recited in claim 1 , wherein the switching module further includes a switching module first diode connected between the first switch and the positive lead, wherein the switching module first diode is arranged to oppose current flow from the positive lead to the first switch. 4. The multilevel rectifier as recited in claim 1 , wherein the switching module further includes a switching module second diode connected between the second switch and the negative lead, wherein the switching module second diode is arranged to oppose current flow from the second switch to the negative lead. 5. The multilevel rectifier as recited in claim 1 , wherein the first switch includes first and second MOSFET devices, wherein the first MOSFET device is connected between the input lead, a switching module first diode connected to the positive lead, the switching module capacitor, and the second MOSFET device, wherein the second MOSFET device is connected between the first MOSFET device, the switching module capacitor, and the midpoint lead. 6. The multilevel rectifier as recited in claim 1 , further comprising an inductor or filters connected between the input lead and an input source. 7. The multilevel rectifier as recited in claim 1 , further comprising a first capacitor and a second capacitor, wherein the first capacitor is connected between the positive lead and the midpoint lead, wherein the second capacitor is connected between the midpoint lead and the negative lead. 8. The multilevel rectifier as recited in claim 1 , further including an alternating current (AC) power source phase connected to the input lead via an inductor or filters. 9. The multilevel rectifier as recited in claim 5 , wherein the second switch includes third and fourth MOSFET devices, wherein the third MOSFET device is connected between the input lead, a switching module second diode connected to the negative lead, the switching module capacitor, and the fourth MOSFET device, wherein the fourth MOSFET device is connected between the third MOSFET device, the switching module capacitor, and the third switch of the switching module. 10. An N-level rectifier, wherein N is a number of voltage levels of the N-level rectifier, comprising: an input lead; a first switching module connected to the input lead; at least one second switching module in series with the first switching module; and a multilevel direct current (DC) link with a positive lead, a midpoint lead, and a negative lead each connected to the at least one second switching module; wherein both the first and second switching modules include a plurality of switch devices operatively connected between the input lead and the positive lead, the midpoint lead, and the negative lead; wherein N is a number greater than or equal to 5; wherein a number of second switching modules is equal to (N−3)/2; and wherein the switching modules each include a first switch, a second switch, a third switch, and a switching module capacitor, wherein the first and second switches are in parallel with one another, wherein the first and second switches are in series between the input lead and direct current link, and wherein the switching module capacitor is connected between the first and second switches, wherein the third switch is connected in series between both the first and second switches and the midpoint lead, wherein the third switch includes a first diode leg, a second diode leg, and a MOSFET device, wherein the first and second diode legs are arranged in parallel with one another, and wherein the MOSFET device is connected between the first and second diode legs. 11. A method of rectifying alternating current (AC) power into direct current (DC) power, comprising: flowing current from an AC power source to a DC link positive lead through a first MOSFET device of a first switch; flowing AC current from the AC power source to a DC link midpoint lead through the first MOSFET device of the first switch, a switching module capacitor, and a second MOSFET device of a second switch, and MOSFET devices of a third switch; flowing current from the AC power source to the DC link positive lead through a first MOSFET device of the second switch and the switching module capacitor; and flowing current from the AC power source to the DC link midpoint lead through both the first MOSFET device and a second MOSFET device of the first switch. 12. The method as recited in claim 11 , further comprising charging the switching module capacitor while flowing AC current from the AC power source to a DC link midpoint lead through the first MOSFET device of the first switch, a switching module capacitor, and a second MOSFET device of a second switch, and MOSFET devices of a third switch. 13. The method as recited in claim 11 , further comprising discharging the switching module capacitor while flowing current from the AC power source to the DC link positive lead through a first MOSFET device of the second switch and the switching module capacitor.

Assignees

Inventors

Classifications

  • Converters with outputs that each can have more than two voltages levels · CPC title

  • Neutral point clamped inverters · CPC title

  • H02M7/217Primary

    using semiconductor devices only · CPC title

  • using semiconductor devices only · CPC title

  • Electricity · mapped topic

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What does patent US9843270B2 cover?
A multilevel rectifier includes an input lead, a switching module, and a multilevel direct current (DC) link. The switching module includes a plurality of switch devices connected to the input lead. The multilevel DC link includes a positive lead, a midpoint lead, and a negative lead. each connected to the switching module. The plurality of switching module switch devices are operatively connec…
Who is the assignee on this patent?
Hamilton Sundstrand Corp
What technology area does this patent fall under?
Primary CPC classification H02M7/217. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).