Semiconductor memory device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9842849-B1
Application number	US-201715463675-A
Country	US
Kind code	B1
Filing date	Mar 20, 2017
Priority date	Sep 16, 2016
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

According to one embodiment, a semiconductor memory device includes a semiconductor substrate, a stacked body, a semiconductor member, a semiconductor portion, a first insulating film, and a charge storage film. The semiconductor member includes a first portion and a second portion, the first portion contacting with the semiconductor substrate, the second portion being provided on the first portion, contacting with the first portion, and having a second width smaller than a first width of the first portion in a first direction crossing a stacking direction. The first insulating film is provided on a side surface of the second portion. The charge storage film is provided on a side surface of the semiconductor portion, extends in the stacking direction, and includes a first portion located on an upper surface of the second portion of the semiconductor member.

First claim

What is claimed is:

1. A semiconductor memory device, comprising:
a semiconductor substrate;
a stacked body provided on the semiconductor substrate and including a plurality of electrode layers separately stacked each other;
a semiconductor member provided in the semiconductor substrate and in the stacked body, extending in a stacking direction of the plurality of electrode layers, and including a first portion and a second portion, the first portion being in contact with the semiconductor substrate, the second portion being provided on the first portion, being in contact with the first portion, and having a second width smaller than a first width of the first portion in a first direction crossing the stacking direction;
a semiconductor portion provided in the stacked body, extending in the stacking direction, and being in contact with an upper surface of the second portion;
a first insulating film provided on a side surface of the second portion; and
a charge storage film provided on a side surface of the semiconductor portion, extending in the stacking direction, and including a first portion located on an upper surface of the second portion of the semiconductor member.

2. The device according to claim 1 , wherein the charge storage film includes a second portion located on a side surface of the second portion of the semiconductor member.

3. The device according to claim 2 , wherein the charge storage film is in contact with the second portion of the semiconductor member.

4. The device according to claim 1 , wherein the charge storage film is not disposed in the electrode layer which is a lowest layer in the plurality of electrode layers.

5. The device according to claim 1 , wherein the first insulating film extends in the stacking direction to surround the semiconductor portion, and is located on an upper surface of the first portion of the semiconductor member.

6. The device according to claim 5 , wherein the charge storage film is located between the second portion of the semiconductor member and the first insulating film and between the semiconductor portion and the first insulating film.

7. The device according to claim 1 , wherein in the stacking direction, the second portion is located on an upper side of the electrode layer which is a lowest layer in the plurality of electrode layers.

8. The device according to claim 1 , wherein in the stacking direction, the second portion is located between the electrode layer which is a lowest layer and the electrode layer which is a second lowest layer in the plurality of electrode layers.

9. The device according to claim 8 , wherein a distance in the stacking direction between the second portion and the electrode layer which is the second lowest layer is not more than a width in the stacking direction of a word line or not more than a width in the stacking direction of a selection gate.

10. The device according to claim 1 , wherein in the stacking direction, an upper surface of the second portion is located in the electrode layer which is a second lowest layer in the plurality of electrode layers.

11. The device according to claim 1 , wherein
an upper surface of the second portion includes a plane portion and an inclined portion, the plane portion being substantially parallel to an upper surface of the semiconductor substrate, the inclined portion surrounding the plane portion and being inclined with respect to the upper surface of the semiconductor substrate, and
the semiconductor portion is in contact with the plane portion and the inclined portion.

12. The device according to claim 11 , wherein the charge storage film is located on the inclined portion and a side surface of the second portion.

13. The device according to claim 1 , wherein
a crystal structure of the semiconductor substrate and a crystal structure of the first portion of the semiconductor member are continuous with each other, and
a crystal structure of the first portion of the semiconductor member and a crystal structure of the second portion are continuous with each other.

14. The device according to claim 1 , further comprising:
a second insulating film provided around the semiconductor portion,
wherein the semiconductor portion includes a body and a cover layer provided around the body,
the first insulating film extends in the stacking direction to surround the charge storage film, and is located on an upper surface of the first portion of the semiconductor member,
the charge storage film is located on a side surface of the second portion of the semiconductor member, and
the body is in contact with an upper surface of the second portion of the semiconductor member.

15. A method for manufacturing a semiconductor memory device, comprising:
forming a stacked body by alternately stacking a first insulating layer and a first layer on a silicon substrate;
forming a through-hole extending in a stacking direction of the stacked body to pierce the stacked body and form a concave portion in the silicon substrate;
forming a first portion in a lower part of the through-hole by epitaxially growing silicon using an inner surface of the concave portion of the silicon substrate as a starting point;
forming a first insulating film on an inner wall surface of the through-hole and on an upper surface of the first portion;
removing a part of the first insulating film on the upper surface of the first portion;
forming a second portion on the first portion by epitaxially growing silicon using the upper surface of the first portion exposed by removing the part of the first insulating film as a starting point; and
forming a semiconductor portion by depositing silicon on the second portion.

16. The method according to claim 15 , further comprising:
forming a protective film on an inner surface of the first insulating film after forming the first insulating film; and
removing a portion disposed on a part of the upper surface of the first portion in the protective film.

17. The method according to claim 16 , further comprising:
removing a residual portion of the protective film; and
forming a charge storage film on the inner surface of the first insulating film and on an upper surface of the second portion.

18. The method according to claim 17 , wherein the charge storage film is in contact with the second portion.

19. The method according to claim 15 , further comprising:
forming a slit extending in the stacking direction and a first direction crossing the stacking direction, in the stacked body;
removing the first layer through the slit; and
forming an electrode layer in a cavity obtained by removing the first film through the slit.

Assignees

• Toshiba Memory Corp

Inventors

• Yamasaki Hiroyuki

Classifications

• H10P14/6349

  Deposition of epitaxial materials · CPC title

• H10P14/20

  of semiconductor materials · CPC title

• H01L21/02634

  Electricity · mapped topic

• H01L27/11568 Primary

  Electricity · mapped topic

• H01L21/2022

  Electricity · mapped topic