Organic light emitting display device and method for driving the same

Patent metadata

Field	Value
Publication number	US-9842538-B2
Application number	US-201414534060-A
Country	US
Kind code	B2
Filing date	Nov 5, 2014
Priority date	Nov 6, 2013
Publication date	Dec 12, 2017
Grant date	Dec 12, 2017

Abstract

An organic light emitting display device includes a display panel including data lines, scan lines, initialization lines, and a plurality of pixels, wherein a pixel of the pixels includes: a driving transistor including a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node, the driving transistor configured to control an amount of a drain-to-source current of the driving transistor according to a voltage applied to the first node; an organic light emitting diode configured to emit light depending on the drain-to-source current of the driving transistor; a first transistor coupled between the second node and a data line of the data lines, the first transistor configured to be turned on by a scan signal applied to a scan line of the scan lines; a second transistor configured to initialize the first node by being turned on; and a first capacitor coupled between the first electrode and the second electrode of the second transistor.

First claim

What is claimed is:

1. An organic light emitting display device, comprising:
a display panel comprising data lines, scan lines, initialization lines, emission lines and a plurality of pixels,
wherein a pixel of the pixels comprises:
a driving transistor comprising a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node, the driving transistor configured to control an amount of a drain-to-source current of the driving transistor according to a voltage applied to the first node;
an organic light emitting diode configured to emit light depending on the drain-to-source current of the driving transistor;
a first transistor coupled between the second node and a data line of the data lines, the first transistor configured to be turned on by a scan signal applied to a scan line of the scan lines;
a second transistor configured to initialize the first node by being turned on;
a third transistor coupled between the first node and the third node, and the third transistor is configured to be turned on by the scan signal;
a fourth transistor coupled between the second node and a first voltage supply line that is configured to supply a first power voltage, wherein the fourth transistor is configured to be turned on by an emission signal of an emission line of the emission lines;

a fifth transistor coupled between the third node and the organic light emitting diode, wherein the fifth transistor is configured to be turned on by the emission signal; and
a first capacitor coupled in parallel to the second transistor such that first and second electrodes of the first capacitor are coupled to first and second electrodes of the second transistor, respectively,
wherein a gate electrode of the second transistor is coupled to an initialization line of the initialization lines that is configured to supply an initialization signal,

wherein the first, second and third transistors are configured to be turned on during a first period,
wherein the first and the third transistors are configured to be turned on and the second transistor is configured to be turned off during a second period subsequent to the first period,
wherein a gate electrode of the first transistor is coupled to the scan line, a first electrode of the first transistor is coupled to the data line, a second electrode of the first transistor is coupled to the second node,
wherein a gate electrode of the third transistor is coupled to the scan line, a first electrode of the third transistor is coupled to the third node, a second electrode of the third transistor is coupled to the first node,
wherein a gate electrode of the fourth transistor is coupled to the emission line, a first electrode of the fourth transistor is coupled to the first voltage supply line, a second electrode of the fourth transistor is coupled to the second node,
wherein a gate electrode of the fifth transistor is coupled to the emission line, a first electrode of the fifth transistor is coupled to the third node, a second electrode of the fifth transistor is coupled to an anode of the organic light emitting diode,
wherein a cathode of the organic light emitting diode is coupled to a second voltage supply line that is configured to supply a second power voltage.

2. The organic light emitting display device of claim 1 , wherein a first electrode of the second transistor is coupled to the first node.

3. The organic light emitting display device of claim 1 , wherein the first electrode of the second transistor is coupled to the first node, and the second electrode of the second transistor is coupled to an initialization voltage line that is configured to supply an initialization voltage.

4. The organic light emitting display device of claim 1 , wherein the fourth and fifth transistors are configured to be turned off during the first period and the second period.

5. The organic light emitting display device of claim 4 , wherein the first to third transistors are configured to be turned off and the fourth and fifth transistors are configured to be turned on during a third period subsequent to the second period.

6. The organic light emitting display device of claim 5 , wherein the scan signal and an initialization signal applied to an initialization line of the initialization lines are at a first logic level voltage and the emission signal is at a second logic level voltage during the first period.

7. The organic light emitting display device of claim 6 , wherein the scan signal is at the first logic level voltage and the initialization signal and the emission signal are at the second logic level voltage during the second period.

8. The organic light emitting display device of claim 7 , wherein the emission signal is at the first logic level voltage and the scan signal and the initialization signal are at the second logic level voltage during the third period.

9. The organic light emitting display device of claim 8 , wherein each of the first to fifth transistors are configured to be turned on by the first logic level voltage and to be turned off by the second logic level voltage.

10. The organic light emitting display device of claim 1 , wherein each of the first and second periods comprise several horizontal periods or dozens of horizontal periods.

11. The organic light emitting display device of claim 1 , wherein the pixel further comprises a second capacitor coupled between the first node and a first voltage supply line that is configured to supply a first power voltage.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Won-Jun
• Wang In-Soo

Classifications

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2300/0852

  being a dynamic memory with more than one capacitor · CPC title

• G09G2320/045

  Compensation of drifts in the characteristics of light emitting or modulating elements · CPC title

• G09G2310/06

  Details of flat display driving waveforms · CPC title