Method and apparatus for modulo operation

US9841946B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9841946-B1
Application numberUS-201514938053-A
CountryUS
Kind codeB1
Filing dateNov 11, 2015
Priority dateNov 11, 2015
Publication dateDec 12, 2017
Grant dateDec 12, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

In some applications, such as randomization and cryptography, remainder computation for a number is required. The remainder computation is also used in modulo arithmetic. The remainder computation can be simplified when the divisor belongs to a certain class of numbers. A method and apparatus are disclosed that enable low complexity implementation of remainder computation of any number when the divisor belongs to a type of numbers that can be represented as 2 k +1.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for searching information of a communication signal received at a communication device from a wireless communication network for a predetermined message, in which the searching includes computation, based on the information of the communication signal, of a remainder of dividing a dividend by a divisor, and in which the divisor is equal to any of b k ±1, b and k are integers and b is not a power of another number, the method comprising: controlling, by a processing device, the searching, in which the searching includes, for each bit position of a binary representation of the dividend: subtracting, from a weight of the bit position, an integral multiple of the divisor nearest to the weight of the bit position, to obtain a difference, and multiplying the difference by a value of the bit position to obtain a product; controlling, by the processing device, summing the products respectively for the bit positions to obtain a first sum, in which the remainder is the first sum unless the first sum is (i) negative or (ii) positive and greater than the divisor; and in which the searching includes when the first sum is negative, adding the divisor recursively to the first sum to obtain a second sum until the second sum is positive, in which the remainder is the second sum when the second sum is positive, and when the first sum is positive and greater than the divisor, recursively subtracting the divisor from the first sum to obtain a third sum until the third sum is less than the divisor, in which the remainder is the third sum when the third sum is less than the divisor. 2. An apparatus for searching information of a communication signal received at a communication device from a wireless communication network for a predetermined message, in which the searching includes computation, based on the information of the communication signal, of a remainder of dividing a dividend by a divisor, and in which the divisor is equal to any of b k ±1, b and k are integers and b is not a power of another number, the apparatus comprising: circuitry configured to control the searching, in which the searching includes, for each bit position of a binary representation of the dividend: subtracting, from a weight of the bit position, an integral multiple of the divisor nearest to the weight of the bit position, to obtain a difference, and multiplying the difference by a value of the bit position to obtain a product; in which the searching includes summing the products respectively for the bit positions to obtain a first sum, in which the remainder is the first sum unless the first sum is (i) negative or (ii) positive and greater than the divisor; and in which the searching includes when the first sum is negative, adding the divisor recursively to the first sum to obtain a second sum until the second sum is positive, in which the remainder is the second sum when the second sum is positive, and when the first sum is positive and greater than the divisor, recursively subtracting the divisor from the first sum to obtain a third sum until the third sum is less than the divisor, in which the remainder is the third sum when the third sum is less than the divisor. 3. A wireless communication device comprising: a receiver to receive a communication signal obtained from a wireless communication network; a processing device configured to control searching information of the communication signal for a predetermined message, in which the searching includes computation, based on the information of the communication signal, of a remainder of dividing a dividend by a divisor, and in which the divisor is equal to any of b k ±1, b and k are integers and b is not a power of another number; in which the searching includes, for each bit position of a binary representation of the dividend: subtracting, from a weight of the bit position, an integral multiple of the divisor nearest to the weight of the bit position, to obtain a difference, and multiplying the difference by a value of the bit position to obtain a product; in which the searching includes summing the products respectively for the bit positions to obtain a first sum, in which the remainder is the first sum unless the first sum is (i) negative or (ii) positive and greater than the divisor; and in which the searching includes when the first sum is negative, adding the divisor recursively to the first sum to obtain a second sum until the second sum is positive, in which the remainder is the second sum when the second sum is positive, and when the first sum is positive and greater than the divisor, recursively subtracting the divisor from the first sum to obtain a third sum until the third sum is less than the divisor, in which the remainder is the third sum when the third sum is less than the divisor.

Assignees

Inventors

Classifications

  • G06F7/72Primary

    using residue arithmetic · CPC title

  • Modulo N arithmetic, with N being either (2**n)-1,2**n or (2**n)+1, e.g. mod 3, mod 4 or mod 5 (G06F7/728 takes precedence) · CPC title

  • G06F7/38Primary

    Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9841946B1 cover?
In some applications, such as randomization and cryptography, remainder computation for a number is required. The remainder computation is also used in modulo arithmetic. The remainder computation can be simplified when the divisor belongs to a certain class of numbers. A method and apparatus are disclosed that enable low complexity implementation of remainder computation of any number when the…
Who is the assignee on this patent?
Mbit Wireless Inc
What technology area does this patent fall under?
Primary CPC classification G06F7/72. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 12 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).