Semiconductor device with oscillation frequency error correction

Patent metadata

Field	Value
Publication number	US-9838022-B2
Application number	US-201715406506-A
Country	US
Kind code	B2
Filing date	Jan 13, 2017
Priority date	Apr 27, 2012
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

A semiconductor device includes an oscillator that oscillates at a specific frequency, a semiconductor integrated circuit that integrates a temperature sensor that detects a peripheral temperature, and a controller that is electrically connected to the oscillator and that corrects temperature dependent error in the oscillation frequency of the oscillator based on the temperature detected by the temperature sensor and a sealing member that integrally seals the oscillator and the semiconductor integrated circuit.

First claim

What is claimed is:

1. A semiconductor device comprising:
an oscillator that is configured to oscillate at an oscillation frequency that corresponds to a predetermined frequency; and
a semiconductor integrated circuit that integrates
a register that stores a value for correcting an error in the oscillation frequency of the oscillator,
a clock generation circuit that creates a predetermined clock based on the value stored in the register,
a controller that is configured to derive the value for correcting the error in the oscillation frequency of the oscillator based on a peripheral temperature, and
a timer circuit that determines a time based on the clock and transmits the time to the controller.

2. The semiconductor device of claim 1 , further comprising a temperature sensor configured to detect the peripheral temperature.

3. The semiconductor device of claim 1 , further comprising a temperature register that stores frequency correction data for each of a plurality of temperatures, wherein
the controller is further configured to receive the frequency correction data from the temperature register and to derive the value for correcting the error based on the received frequency correction data.

4. The semiconductor device of claim 3 , wherein, in cases in which the peripheral temperature is different from the plurality of temperatures, the controller is configured to derive the value for correcting the error by employing frequency correction data of one of the temperatures higher than the peripheral temperature and frequency correction data of another one of the temperatures lower than the peripheral temperature.

5. The semiconductor device of claim 3 , wherein:
the temperature register further stores temperature correction data for each of the plurality of temperatures; and
the controller is further configured to derive the value for correcting the error based on the temperature correction data stored in the temperature register and the frequency correction data stored in the temperature register.

6. The semiconductor device of claim 1 , further comprising a temperature register that stores temperature correction data for each of a plurality of temperatures, wherein
the controller is further configured
to receive the temperature correction data from the temperature register,
to correct the peripheral temperature based on the received temperature correction,
to thereby obtain a corrected temperature, and
to derive the value for correcting the error using the corrected temperature.

7. The semiconductor device of claim 1 , wherein the semiconductor integrated circuit further comprises an input terminal to which a reference clock is input from an external device, the reference clock having a frequency higher than the predetermined frequency of the oscillator, the reference clock being used by said controller to derive the value for correcting the error of the oscillation frequency of the oscillator.

8. The semiconductor device of claim 7 , further comprising a lead frame on which the oscillator and the semiconductor integrated circuit are mounted, the input terminal is electrically connected to the lead frame.

9. The semiconductor device of claim 1 , wherein the semiconductor integrated circuit further comprises an output terminal that outputs the value for correcting the error of the oscillator that is derived by the controller to an external device.

10. The semiconductor device of claim 1 , further comprising:
an oscillation circuit that is connected to the oscillator and causes the oscillator to oscillate, wherein
the clock generation circuit includes a frequency divider circuit that frequency-divides a signal output from the oscillator and generates the predetermined clock, and
the timer circuit determines the time based on outputs from the oscillation circuit and the frequency divider circuit.

11. The semiconductor device of claim 1 , wherein
the semiconductor integrated circuit is of a rectangular shape in a plan view thereof, and
a center of the oscillator is substantially aligned with a center of the semiconductor integrated circuit along an axis of the semiconductor integrated circuit parallel to two sides of the rectangular shape.

12. The semiconductor device of claim 1 , wherein the semiconductor integrated circuit overlaps the oscillator a plan view thereof.

13. A measurement device, comprising:
the semiconductor device of claim 1 ;
a measurement section that measures integral power consumption based on a time determined according to an oscillation signal from the oscillator in the semiconductor device; and
a display section that displays the measured integral power and the time.

14. A semiconductor device comprising:
an oscillator that is configured to oscillate at an oscillation frequency that corresponds to a predetermined frequency; and
a semiconductor integrated circuit that is configured to
generate a predetermined clock using a value for correcting an error in the oscillation frequency of the oscillator based on a peripheral temperature,
determine a time based on the generated clock, and
transmit the time to a controller.

Assignees

• Lapis Semiconductor Co Ltd

Inventors

• Yamada Kazuya
• Sone Toshihisa
• Takei Akihiro
• Yoshida Yuichi
• Takemasa Kengo

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5449

  not being orthogonal to a side surface of the chip, e.g. fan-out arrangements · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/932

  Plan-view shape, i.e. in top view · CPC title

• H10W90/811

  Multiple chips on leadframes · CPC title