Adjusting the magnitude of a capacitance of a digitally controlled circuit

Patent metadata

Field	Value
Publication number	US-9837959-B2
Application number	US-201514791804-A
Country	US
Kind code	B2
Filing date	Jul 6, 2015
Priority date	Aug 27, 2014
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

An apparatus comprises a digitally controlled circuit having a variable capacitance and a controller configured to adjust a magnitude of the variable capacitance of the digitally controlled circuit. The digitally controlled circuit comprises a plurality of gain elements, the plurality of gain elements comprising one or more positive voltage-to-frequency gain elements and one or more negative voltage-to-frequency gain elements. The controller is configured to adjust the magnitude of the capacitance by adjusting the gain provided by respective ones of the gain elements in an alternating sequence of the positive voltage-to-frequency gain elements and the negative voltage-to-frequency gain elements.

First claim

What is claimed is:

1. A method comprising:
generating a control voltage for a digitally controlled circuit having a variable capacitance, the digitally controlled circuit comprising a plurality of gain elements;
providing control signals to the plurality of gain elements by applying the control voltage to a first one of the plurality of gain elements and applying a fixed high voltage or a fixed low voltage to other ones of the plurality of gain elements; and
adjusting a magnitude of the variable capacitance of the digitally controlled circuit by adjusting the control voltage applied to the first gain element and, if the first gain element is saturated, adjusting the control signals to apply the fixed high voltage or the fixed low voltage to the first gain element and to apply the control voltage to a second one of the plurality of gain elements;
wherein the first gain element comprises one of a positive voltage-to-frequency gain element and a negative voltage-to-frequency gain element and the second gain element comprises the other one of a positive voltage-to-frequency gain element and a negative voltage-to-frequency gain element;
wherein the plurality of gain elements comprises two or more banks of gain elements;
wherein providing control signals to the plurality of gain elements comprises applying the control voltage to one gain element in each of the two or more banks and applying the fixed high voltage or the fixed low voltage to other ones of the gain elements in the two or more banks;
wherein the control signals for gain elements in the two or more banks are offset from one another; and
wherein generating the control voltage for the digitally controlled circuit comprises:
using first and second digital-to-analog converters to generate first and second digital-to-analog control voltages in response to control codes;
selecting one of the first digital-to-analog control voltage, the fixed high voltage and the fixed low voltage to connect to corresponding ones of a first one of the two or more banks of gain elements based on the control signals;
selecting one of the second digital-to-analog control voltage, the fixed high voltage and the fixed low voltage to connect to corresponding ones of a second one of the two or more banks of gain elements based on the control signals; and
adjusting the control signals such that one of the gain elements in the first bank is supplied with the first digital-to-analog control voltage, one of the gain elements in the second bank is supplied with the second digital-to-analog control voltage, and remaining ones of the gain elements in the first bank and the second bank are supplied with the fixed high voltage or the fixed low voltage.

2. The method of claim 1 , wherein at least one of the first digital-to-analog converter and the second digital-to-analog converter comprises a transfer function providing hysteresis for the control codes.

3. The method of claim 1 , wherein the plurality of gain elements comprise varactors.

4. The method of claim 1 , wherein the plurality of gain elements comprise high-Q switched capacitors.

5. The method of claim 1 , wherein a magnitude of the offset of the control signals is based at least in part on the number of banks of gain elements.

6. The method of claim 1 , wherein the digitally controlled circuit comprises one of an oscillator and a filter.

7. The method of claim 1 , wherein the digitally controlled circuit comprises two or more digitally switched high-Q capacitors for coarse band tuning of the magnitude of the variable capacitance, the plurality of gain elements comprising a plurality of digitally controlled varactors providing for continuous tuning of the magnitude of the variable capacitance within a given coarse band.

8. The method of claim 4 , wherein each of the high-Q switched capacitors comprises a first switched capacitor controlled by a first transistor and a second switched capacitor controlled by a second transistor, and further comprising providing a same control voltage to each of the first transistor and the second transistor, the first transistor and the second transistor having different threshold voltages.

Assignees

• IBM

Inventors

• Ainspan Herschel A
• Ferriss Mark A
• Friedman Daniel J
• Rylyakov Alexander V
• Sadhu Bodhisatwa
• Valdes-Garcia Alberto

Classifications

• H03B5/1215

  the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair · CPC title

• H03H11/04

  Frequency selective two-port networks · CPC title

• H03B5/124

  the means comprising a voltage dependent capacitance · CPC title

• H03K5/04

  by increasing duration; by decreasing duration · CPC title

• H03L2207/06

  Phase locked loops with a controlled oscillator having at least two frequency control terminals · CPC title