Printed circuit board comprising blind press-fit vias

Patent metadata

Field	Value
Publication number	US-9837736-B2
Application number	US-201414311293-A
Country	US
Kind code	B2
Filing date	Jun 21, 2014
Priority date	Jun 21, 2014
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

An apparatus comprises a printed circuit board (PCB) having a first surface and a second surface, a plurality of blind press-fit vias penetrating the first surface and extending partially through the PCB toward the second surface, the blind press-fit vias configured to receive press-fit connectors of at least one component to be connected to the PCB, and a plurality of electrical connectors disposed in a region of the second surface opposite the blind press-fit vias and configured to interface with one or more signal processing components disposed on the second surface.

First claim

The invention claimed is:

1. An apparatus, comprising:
a printed circuit board (PCB) having a first surface and a second surface;
a plurality of blind press-fit vias penetrating the first surface and extending partially through the PCB toward the second surface, the blind press-fit vias configured to receive press-fit connectors of at least one component to be connected to the PCB, the at least one component comprising a module slot for a compact peripheral component express (cPCI-E) module or a PCI-E eXtensions for instrumentation (PXI-E) module, wherein the PCB forms a backplane compatible with cPCI-E or PXI-E; and
a plurality of electrical connectors disposed in a region of the second surface opposite the blind press-fit vias and configured to interface with one or more signal processing components disposed on the second surface, wherein the blind press-fit vias are configured to connect at least one hybrid peripheral slot to the backplane, and each of the at least one hybrid slots comprises a 32-bit PCI connector, a PCI-E connector, and a connector for instrument functions such as triggers and clocks.

2. The apparatus of claim 1 , wherein the blind press-fit vias define hybrid slots of a full hybrid cPCI-E or PXI-E backplane.

3. The apparatus of claim 1 , further comprising a PCI-E switch integrated circuit (IC) disposed on the second surface and connected to the plurality of electrical connectors.

4. The apparatus of claim 1 , further comprising:
a physical support structure incorporating the backplane;
a plurality of module slots disposed on the backplane and configured to receive PCI-E compatible modules, the module slots comprising at least one system slot, at least one timing slot, and a plurality of peripheral slots; and
a cavity configured to house and cool an embedded controller connected to the system slot.

5. The apparatus of claim 1 , further comprising a plurality of embedded capacitors disposed in the PCB between the electrical connectors and the blind press-fit vias.

6. The apparatus of claim 5 , wherein the embedded capacitors comprise thin laminate layers of the PCB.

7. The apparatus of claim 5 , wherein the embedded capacitors are configured to provide high speed power decoupling to the one or more signal processing components disposed on the second surface.

8. The apparatus of claim 1 , further comprising a plurality of signal routing layers disposed in laminate layers of the PCB between the blind press-fit vias and the electrical connectors.

9. The apparatus of claim 1 , further comprising at least one plated through hole via extending from the first surface to the second surface.

10. The apparatus of claim 9 , wherein the at least one plated through hole via electrically connects at least one of the blind press-fit vias with at least one of the electrical connectors.

11. The apparatus of claim 1 , wherein the PCB comprises a first PCB component incorporating the blind press-fit vias and a second PCB component incorporating the electrical connectors, wherein the blind press-fit vias are formed by creating plated through hole vias in the first PCB component, and thereafter laminating the first PCB component to the second PCB component.

Assignees

• Keysight Technologies Inc

Inventors

• Lam Kuen Yew
• Oon Thiam Ping
• Richard Jared

Classifications

• H05K1/115

  Via connections; Lands around holes or via connections (H05K1/112 takes precedence) · CPC title

• Y10T29/49128

  Assembling formed circuit to base · CPC title

• H05K2201/1059

  Connections made by press-fit insertion · CPC title

• Y10T156/1057

  Subsequent to assembly of laminae · CPC title

• H01R12/585 Primary

  Terminals having a press fit or a compliant portion and a shank passing through a hole in the printed circuit board · CPC title