Interconnection structure and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9837306-B2
Application number	US-201615145369-A
Country	US
Kind code	B2
Filing date	May 3, 2016
Priority date	Dec 21, 2015
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

An interconnection structure includes a first dielectric layer, a bottom conductive feature present in the first dielectric layer, a second dielectric layer present on the first dielectric layer, an aluminum-containing etch stop layer present between the first dielectric layer and the second dielectric layer, an upper conductive via present at least in the second dielectric layer and electrically connected to the bottom conductive feature, and at least one aluminum-containing fragment present at least at a bottom corner of the upper conductive via.

First claim

What is claimed is:

1. An interconnection structure comprising:
a first dielectric layer;
a bottom conductive feature present in the first dielectric layer;
a second dielectric layer present on the first dielectric layer and having a hole therein;
an upper conductor present in the hole and electrically connected to the bottom conductive feature; and
a plurality of fragments comprising aluminum and present at least partially on at least one sidewall of the hole, wherein a density of the fragments at the bottom of the sidewall of the hole is greater than that in the middle of the sidewall of the hole.

2. The interconnection structure of claim 1 , further comprising:
an etch stop layer comprising aluminum and present between the first dielectric layer and the second dielectric layer.

3. The interconnection structure of claim 2 , wherein the etch stop layer is made of aluminum nitride, aluminium oxynitride, aluminum carbide, or combinations thereof.

4. The interconnection structure of claim 1 , wherein the hole has at least one bottom corner, and at least one of the fragments is present at the bottom corner of the hole.

5. The interconnection structure of claim 1 , wherein the upper conductor is made of a substantially aluminum free material.

6. The interconnection structure of claim 1 , wherein the upper conductor is made of copper.

7. The interconnection structure of claim 1 , further comprising:
a barrier layer present at least between the upper conductor and the second dielectric layer.

8. The interconnection structure of claim 7 , wherein the barrier layer is made of a substantially aluminum free material.

9. An interconnection structure comprising:
a first dielectric layer;
a bottom conductive feature present in the first dielectric layer;
a second dielectric layer present on the first dielectric layer;
an etch stop layer comprising aluminum and present between the first dielectric layer and the second dielectric layer;
an upper conductive via present at least in the second dielectric layer and electrically connected to the bottom conductive feature; and
at least one fragment comprising aluminum and present at least at a bottom corner of the upper conductive via.

10. The interconnection structure of claim 9 , wherein a plurality of the fragments are present on at least one sidewall of the upper conductive via.

11. The interconnection structure of claim 10 , wherein the sidewall of the upper conductive via has a bottom portion and a middle portion, the bottom portion is closer to the etch stop layer than the middle portion, and a density of the fragments on the bottom portion of the sidewall of the upper conductive via is greater than that on the middle portion of the sidewall of the upper conductive via.

12. The interconnection structure of claim 9 , wherein the etch stop layer is made of aluminum nitride, aluminium oxynitride, aluminum carbide, or combinations thereof.

13. The interconnection structure of claim 9 , further comprising:
an aluminum free etch stop layer present on the etch stop layer.

14. A method of manufacturing an interconnection structure, the method comprising:
forming a bottom conductive feature in a first dielectric layer;
forming an etch stop layer comprising aluminum on the bottom conductive feature and the first dielectric layer;
forming a second dielectric layer on the etch stop layer; and
etching the second dielectric layer and the etch stop layer to form a hole in the second dielectric layer and the etch stop layer, wherein the bottom conductive feature is at least partially exposed by the hole, and the etching the etch stop layer resputters at least one fragment comprising aluminum onto at least one sidewall of the hole.

15. The method of claim 14 , wherein the etch stop layer is made of aluminum nitride, aluminium oxynitride, aluminum carbide, or combinations thereof.

16. The method of claim 14 , further comprising:
forming a barrier layer at least on the sidewall of the hole, wherein the fragment is present between the barrier layer and the sidewall of the hole after the forming the barrier layer; and
forming an upper conductor in the hole after the forming the barrier layer.

17. The method of claim 16 , wherein the upper conductor is made of a substantially aluminum free material.

18. The method of claim 16 , wherein the upper conductor is made of copper.

19. The method of claim 16 , wherein the barrier layer is made of a substantially aluminum free material.

20. The method of claim 14 , further comprising:
forming an aluminum free etch stop layer on the etch stop layer before the forming the second dielectric layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Wu Chung-Wen
• Jangjian Shiu-Ko
• Chiu Chien-Wen
• Chen Chien-Chung

Classifications

• H10W20/074

  of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/084

  for dual-damascene structures · CPC title

• H10W20/077

  on sidewalls or on top surfaces of conductors (H10W20/076 takes precedence) · CPC title

• H10W20/075

  of multilayered thin functional dielectric layers · CPC title