Transformer and electrical circuit

Patent metadata

Field	Value
Publication number	US-9837199-B2
Application number	US-201414183618-A
Country	US
Kind code	B2
Filing date	Feb 19, 2014
Priority date	Feb 22, 2013
Publication date	Dec 5, 2017
Grant date	Dec 5, 2017

Abstract

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.

First claim

The invention claimed is:

1. A transformer, comprising:
at least one first primary turn; wherein the at least one first primary turn comprises a further first primary turn, wherein the first primary turns are arranged in different metallization planes which are parallel with each other;
at least one second primary turn; and
a first secondary turn and a second secondary turn;
wherein the first secondary turn is arranged laterally between the at least one first primary turn and the at least one second primary turn; and
wherein the first secondary turn and the second secondary turn are arranged in different metallization planes, which are parallel with each other.

2. The transformer of claim 1 ,
wherein the first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn.

3. The transformer of claim 1 , further comprising:
wherein the at least one second primary turn comprises a further second primary turn, wherein the second primary turns are arranged in different metallization planes which are parallel with each other.

4. The transformer of claim 1 ,
wherein the primary turns and the secondary turns are arranged on a die or a chip.

5. An electronic circuit, comprising:
a power amplifier; and
a transformer coupled to the amplifier circuit and comprising:
at least one first primary turn;
at least one second primary turn; and
a first secondary turn and a second secondary turn;
wherein the first secondary turn is arranged laterally between the at least one first primary turn and the at least one second primary turn; and
wherein the first secondary turn and the second secondary turn are arranged in different metallization planes, which are parallel with each other.

6. The electronic circuit of claim 5 ,
wherein the power amplifier is a differential power amplifier.

7. The electronic circuit of claim 5 , further comprising:
an output matching network, wherein the output matching network comprises the transformer.

8. A transformer, comprising:
at least one first primary turn;
at least one second primary turn; and
a first secondary turn and a second secondary turn;
wherein the first secondary turn is arranged laterally between the at least one first primary turn and the at least one second primary turn; and
wherein the first secondary turn and the second secondary turn are arranged in different planes which are parallel with each other;
wherein the at least one first primary turn comprises a further first primary turn, wherein the first primary turns are arranged in different planes which are parallel with each other; and
wherein the at least one second primary turn comprises a further second primary turn, wherein the second primary turns are arranged in different planes which are parallel with each other.

9. The transformer of claim 8 ,
wherein the first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn.

10. The transformer of claim 8 ,
wherein the primary turns and the secondary turns are arranged on a die or a chip.

11. The transformer of claim 8 ,
wherein the first secondary turn and the second secondary turn are arranged in different metallization planes.

12. An electronic circuit, comprising:
an amplifier; and
a transformer coupled to the amplifier circuit and comprising:
at least one first primary turn;
at least one second primary turn; and
a first secondary turn and a second secondary turn;
wherein the first secondary turn is arranged laterally between the at least one first primary turn and the at least one second primary turn; and
wherein the first secondary turn and the second secondary turn are arranged in different planes which are parallel with each other;
wherein the at least one first primary turn comprises a further first primary turn, wherein the first primary turns are arranged in different planes which are parallel with each other; and
wherein the at least one second primary turn comprises a further second primary turn, wherein the second primary turns are arranged in different planes which are parallel with each other.

13. The electronic circuit of claim 12 ,
wherein the amplifier is a power amplifier.

14. The electronic circuit of claim 13 ,
wherein the power amplifier is a differential power amplifier.

15. The electronic circuit of claim 12 , further comprising:
an output matching network, wherein the output matching network comprises the transformer.

Assignees

• Intel Mobile Comm Gmbh
• Intel Deutschland Gmbh

Inventors

• Leuschner Stephan
• Moreira José
• Pfann Peter

Classifications

• H03F3/21

  with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

• H03F2200/387

  A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier · CPC title

• H01F2027/2809

  on stacked layers · CPC title

• H03F2200/541

  Transformer coupled at the output of an amplifier · CPC title

• H03F2200/09

  A balun, i.e. balanced to or from unbalanced converter, being present at the output of an amplifier · CPC title