Network interface device having a solid-state safeguard apparatus for preserving the quality of passive operation in the event of disruptive operational conditions

Patent metadata

Field	Value
Publication number	US-9832533-B2
Application number	US-201313969064-A
Country	US
Kind code	B2
Filing date	Aug 16, 2013
Priority date	Nov 14, 2011
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

A network interface device has a safeguard apparatus. The safeguard apparatus is operable in power on, power off, and degraded power conditions. In power on operation, the safeguard apparatus maintains the quality of active and passive branch communications. During power off and degraded power operation, the safeguard apparatus safeguards the quality of the passive communication path.

First claim

The following is claimed:

1. A safeguard apparatus operable in a network interface device, the safeguard apparatus comprising:
an input node;
a first field-effect transistor (FET) having a drain node, a source node and a gate node;
a first PIN diode having a first PIN diode anode and a first PIN diode cathode;
an output node;
wherein the drain node of the first FET is coupled to the first PIN diode anode and to the input node, the gate node of the first FET is connected to a ground, the first PIN diode cathode is connected to the output node, and the safeguard apparatus is configured to pass signals from the input node and the first FET through the first PIN diode before reaching the output node;
wherein the first FET is configured to be reverse biased so as to allow a CATV network and a subscriber device to communicate through the first FET, the input node, and the output node when the network interface device is in a first mode of operation;
wherein the first FET is configured to be forward biased so as to provide a dampened signal path to a ground path for a CATV signal received through the input node or the output node when the network interface device is in a second mode of operation; and
wherein the first FET is configured to dampen the CATV signal received through the input node or the output node to prevent disruptive reflections from returning through the dampened signal path.

2. The safeguard apparatus of claim 1 , further comprising an anode inductor having a first anode inductor end and a second anode inductor end, wherein: (a) the first anode inductor end is coupled to a voltage source and (b) the second anode inductor end is coupled to the first PIN diode anode.

3. The safeguard apparatus of claim 1 , further comprising a gate resistor having a first gate resistor end and a second gate resistor end, wherein the gate node of the first FET is coupled to the first gate resistor end, and the second gate resistor end is coupled to the ground path.

4. The safeguard apparatus of claim 1 , further comprising:
a cathode resistor having a first cathode resistor end and a second cathode resistor end; and
a cathode inductor having a first cathode inductor end and a second cathode inductor end,
wherein the first cathode resistor end is coupled to the ground, the second cathode resistor end is coupled to the first cathode inductor end, and
the second cathode inductor end is coupled to the first PIN diode cathode and operably coupled to the output node.

5. The safeguard apparatus of claim 1 , further comprising a second PIN diode having a second PIN diode anode and a second PIN diode cathode,
wherein the first PIN diode cathode is coupled to the output node via the second PIN diode,
the second PIN diode anode is coupled to the output node, and the second PIN diode cathode is coupled to the first PIN diode cathode,
wherein the first FET is configured to be reverse biased so as to isolate a throughput communication path from a ground path and allow unimpeded communication between the input node to the output node in a first mode of operation and configured to be forward biased to provide a dampened signal path to the ground path in a second mode of operation.

6. The safeguard apparatus of claim 5 , further comprising a second anode inductor having a first end and a second end, wherein: (a) the first end of the second anode inductor is coupled to a voltage source and (b) the second end of the second anode inductor is coupled to the second PIN diode anode.

7. The safeguard apparatus of claim 1 , further comprising a phase cancellation element having a first phase cancellation element end and a second phase cancellation element end, wherein: (a) the first phase cancellation element end is coupled to the source node of the first FET and (b) the second phase cancellation element end is coupled to the ground.

8. The safeguard apparatus of claim 7 , wherein the phase cancellation element comprises a balun transformer.

9. The safeguard apparatus of claim 1 , wherein the safeguard apparatus comprises a solid-state configuration.

10. The safeguard apparatus of claim 1 , further comprising a second FET having a second FET drain node, a second FET source node and a second FET gate node, wherein: (a) the second FET drain node is coupled to the source node of the first FET, and (b) the second FET drain node is coupled to the first PIN diode anode and to the input node via the first FET.

11. The safeguard apparatus of claim 10 , further comprising a gate resistor having a first gate resistor end and a second gate resistor end, wherein: (a) the first gate resistor end is coupled to the second FET gate node and (b) the second gate resistor end is coupled to the ground.

12. The safeguard apparatus of claim 1 , further comprising a source inductor having a first source inductor end and a second source inductor end, wherein: (a) the first source inductor end is coupled to the source node of the first FET and coupled to the ground, and (b) the second source inductor end is coupled to a voltage source.

13. The safeguard apparatus of claim 12 , where the voltage source is a control voltage provided by a fault sensing circuit.

14. The safeguard apparatus of claim 1 , further comprising:
an input capacitor directly coupled to the input node, the drain node of the first FET, and the first PIN diode anode;
an anode inductor directly coupled to the input capacitor, the drain node of the first FET, and the first PIN diode anode, wherein the anode inductor is configured to receive power from a DC voltage source;
a gate resistor directly coupled to the gate node of the first FET;
a cathode inductor directly coupled to the first pin diode cathode;
a cathode resistor directly coupled to the cathode inductor; and
an output capacitor directly coupled to the output node.

15. The safeguard apparatus of claim 1 , wherein the gate node of the first FET is connected to a ground such that signals pass through the gate node to the ground.

16. The safeguard apparatus of claim 1 , wherein the first PIN diode cathode is connected to the output node such that signals pass through the first PIN diode cathode to the output node.

17. The safeguard apparatus of claim 1 , further comprising a damping circuit comprising the first FET, wherein the damping circuit is configured to dampen the CATV signal received via the input node or the output node to prevent disruptive reflections from returning through the dampened signal path.

18. The safeguard apparatus of claim 17 , wherein the damping circuit is configured to dampen the CATV signal without electromagnetic switching.

19. The safeguard apparatus of claim 17 , wherein the damping circuit comprises a solid-state configuration that has no moving or electromechanical switches.

20. The safeguard apparatus of claim 1 , wherein the first FET is configured to dampen the CATV signal by reducing an amplitude of oscillation of the CATV signal.

21. A safeguard apparatus operable in a network interface device, the safeguard apparatus comprising:
an input node;
an anode inductor having a first anode inductor end and a second anode inductor end;
a first field-effect transistor (FET) having a drain node, a source node and a gate node;
a gate resistor having a first gate resistor end and a second gate resistor end;
a cathode inductor having a first cathode inductor end and a second cathode inductor end;
an cathode resistor having a first cathode resistor end and a second cathode resist

Assignees

• Ppc Broadband Inc

Inventors

• Li Yan
• Bailey Paul F
• Alkan Erdogan

Classifications

• H04N21/6118

  involving cable transmission, e.g. using a cable modem · CPC title

• H04N21/436

  Interfacing a local distribution network, e.g. communicating with another STB {or one or more peripheral devices} inside the home · CPC title

• H04N7/17309

  Transmission or handling of upstream communications · CPC title

• H04L12/2892

  characterised by the access multiplexer architecture · CPC title

• H04N21/61 Primary

  Network physical structure; Signal processing (H04B takes precedence) · CPC title