Display panel

Patent metadata

Field	Value
Publication number	US-9831276-B2
Application number	US-201514953667-A
Country	US
Kind code	B2
Filing date	Nov 30, 2015
Priority date	Dec 2, 2014
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

A display panel is disclosed, which comprises a first substrate including: a base substrate; a semiconductor layer; a first insulating layer; a first scan line and a second scan line extended along a first direction respectively and portions of the first scan line and the second scan line overlapping with the semiconductor layer; a second insulating layer; a data line extended along a second direction and electrically connecting to the semiconductor layer through a first contact via, wherein the second direction is different from the first direction; and a first metal pad and a second metal pad electrically connecting to the semiconductor layer through two second contact vias respectively; wherein the first contact via and the two second contact vias are disposed between the first scan line and the second scan line.

First claim

What is claimed is:

1. A display panel, comprising a first substrate, a display layer, and a second substrate, wherein the display layer is disposed between the first substrate and the second substrate; and the first substrate comprises:
a base substrate;
a semiconductor layer disposed on the base substrate;
a first insulating layer disposed on the semiconductor layer;
a first scan line and a second scan line disposed on the first insulating layer and extended along a first direction respectively, and portions of the first and the second scan lines overlapping with the semiconductor layer;
a second insulating layer disposed on the first scan line, the second scan line, and the first insulating layer;
a third insulating layer disposed on the first metal pad, the second metal pad, and the second insulating layer;
a data line disposed on the second insulating layer and extended along a second direction, and the data line electrically connecting to the semiconductor layer through a first contact via, wherein the second direction is different from the first direction;
a first metal pad and a second metal pad disposed on the second insulating layer, and the first metal pad and the second metal pad electrically connecting to the semiconductor layer through two second contact via respectively;
a first pixel electrode layer disposed on the third insulating layer, wherein the first pixel electrode layer electrically connects to the first metal pad through a third contact via;
a second pixel electrode layer disposed on the third insulating layer, wherein the second pixel electrode layer electrically connects to the second metal pad through another third contact via; and
wherein the first contact via and the two second contact vias are disposed between the first scan line and the second scan line.

2. The display panel of claim 1 , wherein the first pixel electrode layer and the second pixel electrode layer are disposed adjacently at the same side of the data line.

3. The display panel of claim 1 , wherein the first pixel electrode layer and the second pixel electrode layer are disposed adjacently at different sides of the data line, and the first scan line has a first inner edge and a first outer edge, the second scan line has a second inner edge and a second outer edge, and the first inner edge is adjacent to the second inner edge.

4. The display panel of claim 3 , wherein the first pixel electrode layer overlaps with the first inner edge and the first outer edge of the first scan line, and the second pixel electrode layer overlaps with the second inner edge and the second outer edge of the second scan line.

5. The display panel of claim 3 , wherein the first pixel electrode layer and the second pixel electrode layer are disposed between the first outer edge of the first scan line and the second outer edge of the second scan line.

6. The display panel of claim 1 , further comprising a plurality of light-shielding layers disposed between the base substrate and the semiconductor layer, wherein the light-shielding layers are disposed in regions corresponding to an area of the semiconductor layer which overlaps with the first scan line and another area of the semiconductor layer which overlaps with the second scan line.

7. The display panel of claim 6 , further comprising a buffer layer disposed between the base substrate and the semiconductor layer, wherein the light-shielding layers are disposed between the base substrate and the buffer layer.

8. The display panel of claim 1 , further comprising a first black matrix layer and a second black matrix layer disposed between the first substrate and the second substrate, wherein the first black matrix layer covers at least the first scan line or the second scan line, and the second black matrix layer covers at least the data line.

9. The display panel of claim 8 , wherein a width of the first black matrix layer is in a range from 5μm to 50μm.

10. The display panel of claim 8 , wherein the second substrate is a color filter substrate, and the second substrate comprises at least four pixel arrays of different colors, each of the pixel arrays comprises four pixel units of an identical color adjacent to each other, which are a first pixel unit, a second pixel unit, a third pixel unit, and a fourth pixel unit, and the first black matrix layer or the second black matrix layer is disposed between the pixel arrays of different colors.

11. The display panel of claim 8 , wherein the second substrate is a color filter substrate, and the second substrate comprises at least three rows of pixel arrays of different colors, each of the pixel arrays comprises a plurality of pixel units of an identical color arranged along the second direction, and the first black matrix layer is disposed between two adjacent pixel units and another two adjacent pixel units of each pixel array.

12. The display panel of claim 1 , further comprising a first black matrix layer and a second black matrix layer disposed between the first substrate and the second substrate, wherein the first black matrix layer covers at least the first scan line or the second scan line, and the second black matrix layer covers at least a portion of the data line.

13. The display panel of claim 12 , wherein the second substrate is a color filter substrate, and the second substrate comprises at least three pixel arrays of different colors, each of the pixel arrays comprises two pixel units of an identical color adjacent to each other and arranged along the first direction, and the first black matrix layer is disposed between the pixel arrays.

Assignees

• Innolux Corp

Inventors

• Liu Yu-Tsung
• Lee Te-Yu
• Huang Chien-Ta
• Shibazaki Minoru

Classifications

• H01L27/3276

  Electricity · mapped topic

• H01L33/58

  Electricity · mapped topic

• H01L33/62

  Electricity · mapped topic

• H01L27/156

  Electricity · mapped topic

• H01L33/52

  Electricity · mapped topic