Reuse of directory entries for holding state information through use of multiple formats

Patent metadata

Field	Value
Publication number	US-9830265-B2
Application number	US-201314085106-A
Country	US
Kind code	B2
Filing date	Nov 20, 2013
Priority date	Nov 20, 2013
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

The present application is directed to a control circuit that provides a directory configured to maintain a plurality of entries, wherein each entry can indicate sharing of resources, such as cache lines, by a plurality of agents/hosts. Control circuit of the present invention can further provide consolidation of one or more entries having a first format to a single entry having a second format when resources corresponding to the one or more entries are shared by the agents. First format can include an address and a pointer representing one of the agents, and the second format can include a sharing vector indicative of more than one of the agents. In another aspect, the second format can utilize, incorporate, and/or represent multiple entries that may be indicative of one or more resources based on a position in the directory.

First claim

What is claimed is:

1. A control circuit configured to:
maintain a directory for a plurality of entries, the directory configured to facilitate a plurality of formats for the plurality of entries, each of the plurality of entries indicative of sharing of associated resources by a plurality of agents; and
consolidate more than one of the plurality of entries in a first format from the plurality of formats into one or more entries in a second format from the plurality of formats when one of the associated resources corresponding to the more than one of the plurality of entries is shared by multiple ones of the plurality of agents.

2. The control circuit of claim 1 , wherein the sharing of associated resources is sharing of cache lines for a hardware system.

3. The control circuit of claim 1 , wherein each of the plurality of entries is indicative of a cache coherent state of an address.

4. The control circuit of claim 1 , wherein the first format comprises an address and a pointer representing one of the plurality of agents; wherein the second format comprises a sharing vector indicative of more than one of the plurality of agents.

5. The control circuit of claim 1 , wherein the control circuit is further configured to update the sharing vector of the plurality of entries configured in the second format upon an adding or relinquishing of the sharing of associated resources by one of the plurality of agents.

6. The control circuit of claim 1 , wherein the first format comprises an address and a pointer representing one of the plurality of agents; wherein the second format utilizes multiple ones of the plurality of entries.

7. The control circuit of claim 6 , wherein the multiple ones of the plurality of entries of the second format are indicative of a single one of the associated resources based on a position in the directory.

8. The control circuit of claim 1 , wherein at least one of the first format and the second format utilizes multiple ones of the plurality of entries.

9. The control circuit of claim 1 , wherein the directory is a set associative structure.

10. A method, comprising:
maintaining a directory for a plurality of entries, the directory configured to facilitate a plurality of formats for the plurality of entries, each of the plurality of entries indicative of sharing of associated resources by a plurality of agents;
consolidating more than one of the plurality of entries in a first format from the plurality of formats into one or more entries in a second format from the plurality of formats when one of the associated resources corresponding to the more than one of the plurality of first entries is shared by multiple ones of the plurality of agents.

11. The method of claim 10 , wherein the sharing of associated resources is sharing of cache lines for a hardware system.

12. The method of claim 10 , wherein each of the plurality of entries are indicative of a cache coherent state of an address.

13. The method of claim 10 , wherein the first format comprises an address and a pointer representing one of the plurality of agents; wherein the second format comprises a sharing vector indicative of more than one of the plurality of agents.

14. The method of claim 10 , further comprising updating the sharing vector of the plurality of first entries configured in the second format upon an adding or relinquishing of the sharing of associated resources by one of the plurality of agents.

15. The method of claim 10 , wherein the first format comprises an address and a pointer representing one of the plurality of agents; wherein the second format utilizes multiple ones of the plurality of entries.

16. The method of claim 15 , wherein the multiple ones of the plurality of entries of the second format are indicative of a single one of the associated resources based on a position in the directory.

17. The method of claim 10 , wherein at least one of the first format and the second format utilizes multiple ones of the plurality of entries.

18. The method of claim 10 , wherein the directory is a set associative structure.

Assignees

• Netspeed Systems
• Netspeed Systems Inc

Inventors

• Rowlands Joe
• Kumar Sailesh

Classifications

• G06F12/0811

  with multilevel cache hierarchies · CPC title

• G06F12/0826

  Limited pointers directories; State-only directories without pointers · CPC title

• G06F12/084 Primary

  with a shared cache · CPC title

• G06F12/0815

  Cache consistency protocols · CPC title

• G06F12/0817

  using directory methods · CPC title