Micro lens array substrate, electro-optical device, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9829608-B2
Application number	US-201615336138-A
Country	US
Kind code	B2
Filing date	Oct 27, 2016
Priority date	Nov 1, 2012
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

A micro lens array substrate includes a substrate having optical transparency and a lens layer having optical transparency and a different refractive index from that of the substrate, which is formed in such a manner as to fill in a concave portion arranged in one surface of the substrate in the X-direction, the Y-direction, and the W-direction. A through-hole is provided in the lens layer, between the adjacent concave portions in the W-direction in the lens layer, and the lens layer is continuous between the adjacent concave portions in the X-direction or in the Y-direction.

First claim

What is claimed is:

1. A micro lens array substrate comprising:
a substrate having optical transparency, the substrate having a plurality of concave portions arranged in a first direction and a second direction intersecting the first direction on one surface of the substrate;
a lens layer having optical transparency, the lens layer having a different refractive index from that of the substrate, and the lens layer being formed on the one surface of the substrate so as to fill in the plurality of concave portions and to cover a region where the plurality of concave portions is formed; and
a light blocking layer arranged so as to overlap a border between two adjacent concave portions of the plurality of concave portions,
wherein
the plurality of concave portions is arranged so as to be continuous in at least one of the first direction and the second direction,
the plurality of concave portions is arranged so as to have a discontinuous part in the lens layer between two adjacent concave portions of the plurality of concave portions in a third direction, the third direction intersecting the first direction and the second direction, and
a width of the light blocking layer is larger than a width of the discontinuous part.

2. The micro lens array substrate according to claim 1 , wherein
the plurality of concave portions is partitioned into the shape of a lattice along the first and the second directions,
the third direction is a direction in which intersection points on the lattice are diagonally linked together, and
the discontinuous part is provided in a position that corresponds to an intersection point on the lattice.

3. The micro lens array substrate according to claim 2 , wherein the light blocking layer is arranged along the first direction and the second direction.

4. The micro lens array substrate according to claim 1 , further comprising:
a transistor having a channel region that is provided over the one surface of the substrate;
wherein
the light blocking layer is provided between the lens layer and the transistor so as to overlap at least the channel region of the transistor when viewed in plan view, and
the discontinuous part is provided so as to overlap the light blocking layer when viewed in plan view.

5. The micro lens array substrate according to claim 1 , wherein the lens layer has a through-hole in the discontinuous part, when viewed in plan view, the through-hole extending to the substrate.

6. The micro lens array substrate according to claim 5 , further comprising:
a transparent layer having optical transparency,
wherein
the transparent layer is formed so as to fill in the through-hole,
the transparent layer is formed so as to have a same refractive index as the lens layer, and
a heat resistance of the transparent layer is higher than a heat resistance of the lens layer.

7. The micro lens array substrate according to claim 1 , wherein the lens layer includes a groove portion between two adjacent concave portions of the plurality of concave portions, a part of the groove portion extending to the substrate in the discontinuous part when viewed in plan view.

8. The micro lens array substrate according to claim 7 , further comprising:
a transparent layer having optical transparency,
wherein
the transparent layer is formed so as to fill in the groove portion,
the transparent layer is formed so as to have a same refractive index as the lens layer, and
a heat resistance of the transparent layer is higher than a heat resistance of the lens layer.

9. An electro-optical device comprising:
the micro lens array substrate according to claim 1 .

10. An electronic apparatus comprising:
the electro-optical device according to claim 9 .

11. A micro lens array substrate comprising:
a substrate having optical transparency, the substrate having a plurality of concave portions arranged in a first direction and a second direction intersecting the first direction on one surface of the substrate; and
a lens layer having optical transparency, the lens layer having a different refractive index from that of the substrate, and the lens layer being formed on the one surface of the substrate so as to fill in the plurality of concave portions and to cover a region where the plurality of concave portions is formed,
wherein
the plurality of concave portions is arranged so as to be continuous in at least one of the first direction and the second direction,
the plurality of concave portions is arranged so as to have a discontinuous part in the lens layer between two adjacent concave portions of the plurality of concave portions in a third direction, the third direction intersecting the first direction and the second direction, and
a first thickness of the lens layer at a border between two adjacent concave portions of the plurality of concave portions along the first direction is larger than a second thickness of the lens layer at the discontinuous part.

12. The micro lens array substrate according to claim 11 , wherein
the plurality of concave portions is partitioned into the shape of a lattice along the first and the second directions,
the third direction is a direction in which intersection points on the lattice are diagonally linked together, and
the discontinuous part is provided in a position that corresponds to an intersection point on the lattice.

13. The micro lens array substrate according to claim 11 , further comprising:
a transistor having a channel region that is provided over the one surface of the substrate; and
a light blocking layer that is provided between the lens layer and the transistor so as to overlap at least the channel region of the transistor when viewed in plan view,
wherein the discontinuous part is provided so as to overlap the light blocking layer when viewed in plan view.

14. The micro lens array substrate according to claim 11 , wherein the lens layer has a through-hole in the discontinuous part, when viewed in plan view, the through-hole extending to the substrate.

15. The micro lens array substrate according to claim 14 , further comprising:
a transparent layer having optical transparency,
wherein
the transparent layer is formed so as to fill in the through-hole,
the transparent layer is formed so as to have a same refractive index as the lens layer, and
a heat resistance of the transparent layer is higher than a heat resistance of the lens layer.

16. An electro-optical device comprising:
the micro lens array substrate according to claim 11 .

17. An electronic apparatus comprising:
the electro-optical device according to claim 16 .

18. The micro lens array substrate according to claim 11 , wherein the lens layer includes a groove portion between two adjacent concave portions of the plurality of concave portions, a part of the groove portion extending to the substrate in the discontinuous part when viewed in plan view.

19. The micro lens array substrate according to claim 18 , further comprising:
a transparent layer having optical transparency,
wherein
the transparent layer is formed so as to fill in the groove portion,
the transparent layer is formed so as to have a same refractive index as the lens layer, and
a heat resistance of the transparent layer is higher than a heat resistance of the lens layer.

Assignees

• Seiko Epson Corp

Inventors

• Nimura Toru

Classifications

• G02F1/133512

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

• G03B33/12

  using beam-splitting or beam-combining systems, e.g. dichroic mirrors · CPC title

• G02F2001/133607

  Physics · mapped topic

• G02B3/0043 Primary

  Inhomogeneous or irregular arrays, e.g. varying shape, size, height · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title