Circuit for reducing slope magnitude during increasing and decreasing voltage transitions

Patent metadata

Field	Value
Publication number	US-9825616-B2
Application number	US-201514928830-A
Country	US
Kind code	B2
Filing date	Oct 30, 2015
Priority date	Mar 15, 2013
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

A wave shaping circuit reduces slope magnitudes during increasing and decreasing voltage transitions. The wave shaping circuit includes a first switch that receives an input voltage having at least two voltage values where an input voltage transition between the at least two voltage values has a first slope magnitude; an inductor connected in series with the first switch; a second switch connected in a parallel arrangement with the first switch and the inductor; and a capacitor having a first end connected between the inductor and an output port and a second end connected to ground. When the input voltage begins the input voltage transition to a higher voltage value, the first switch turns on and the second switch turns off, such that the inductor limits current flow from the input voltage, decreasing a second slope magnitude of an output voltage transition to less than the first slope magnitude.

First claim

The invention claimed is:

1. A wave shaping circuit for reducing slope magnitudes during at least one of increasing and decreasing voltage transitions, the wave shaping circuit comprising:
a first switch configured to receive an input voltage from a voltage source, the input voltage having at least two voltage values wherein an input voltage transition between the at least two voltage values has a first slope magnitude;
an inductor connected in series between the first switch and a node when the first switch is turned on;
a second switch connected in a parallel arrangement with the first switch and the inductor between the voltage source and the node; and
a capacitor having a first end connected between the node and an output port and a second end connected to ground, the output port providing an output voltage to a load,
wherein, when the input voltage begins the input voltage transition to a higher voltage value, the first switch is configured to be on and the second switch is configured to turn off, such that the inductor limits current flow from the voltage source, providing a substantially constant current into the capacitor to charge the capacitor, thereby decreasing a second slope magnitude of an output voltage transition of the output voltage to less than the first slope magnitude of the input voltage transition.

2. The wave shaping circuit of claim 1 , wherein the capacitor charges substantially linearly with a specific time constant in response to the substantially constant current.

3. The wave shaping circuit of claim 1 , wherein, when the output voltage of the output port reaches the higher voltage value during output voltage transition, the second switch is configured to turn on, such that the inductor is bypassed and the output voltage is maintained in a steady state condition.

4. The wave shaping circuit of claim 1 , wherein, when the output voltage of the output port reaches the higher voltage value during output voltage transition, the first switch is configured to turn off.

5. The wave shaping circuit of claim 1 , wherein, when the input voltage begins the input voltage transition to a lower voltage value, the first switch is configured to be off and the second switch is configured to turn off, such that the capacitor discharges into the load, thereby decreasing the second slope magnitude, until the voltage across the capacitor is substantially the same as the lower voltage value of the input voltage.

6. The wave shaping circuit of claim 5 , wherein the capacitor discharges into the load substantially linearly when the load approximates a current source.

7. The wave shaping circuit of claim 5 , wherein, when the load comprises an amplifier, the output voltage comprises a collector operating voltage of the amplifier.

8. The wave shaping circuit of claim 7 , wherein the output voltage transition seen by the amplifier is a downward slope of dv/dt equal to −i_amplifier/C 1 , where i_amplifier is current through the amplifier and C 1 is capacitance of the capacitor.

9. The wave shaping circuit of claim 5 , wherein the capacitor discharges into the load substantially non-linearly.

10. The wave shaping circuit of claim 5 , wherein, when the output voltage reaches the lower voltage value during output voltage transition, the second switch is configured to turn on, such that the voltage source is connected to the load and the output voltage is maintained in a steady state condition.

11. A wave shaping circuit for reducing slope magnitudes during voltage transitions, the wave shaping circuit comprising:
an inductor connected in series between a voltage source and a node, the voltage source configured to provide an input voltage having one of a plurality of voltage values, including at least a first voltage value and a second voltage value greater than the first voltage value, and to transition between the first and second voltage values;
a second switch connected in a parallel arrangement with the inductor between the voltage source and the node; and
a capacitor having a first end connected between the node and an output port and a second end connected to ground, the output port providing an output voltage to a load,
wherein, when the input voltage begins a ramp-up input voltage transition between the first voltage value and the second voltage value, the second switch is configured to turn off, such that the inductor limits current flow from the voltage source, decreasing a slope magnitude of an output voltage transition of the output voltage to less than the ramp-up input voltage transition,
wherein when the output voltage becomes about equal to the input voltage, the second switch is configured to turn on, bypassing the inductor; and
wherein, when the input voltage begins a ramp-down input voltage transition between the second voltage value and the first voltage value, the second switch is configured to turn off, such that the capacitor discharges into the load, thereby decreasing the slope magnitude of the output voltage transition of the output voltage to less than the ramp-down input voltage transition.

12. The wave shaping circuit of claim 11 , further comprising:
a first switch connected in series between the voltage source and the inductor,
wherein, when the input voltage begins the ramp-up input voltage transition between the first voltage value and the second voltage value, the first switch is configured to turn on, such that the inductor is able to limit the current flow from the voltage source, decreasing the slope magnitude of the output voltage transition of the output voltage to less than the ramp-up input voltage transition.

13. The wave shaping circuit of claim 11 , wherein the output voltage transition continues to decrease until a voltage across the capacitor is substantially the same as the first voltage value when the ramp-down input voltage transition is between the second voltage value and the first voltage value.

14. The wave shaping circuit of claim 12 , wherein when the output voltage becomes about equal to the input voltage, the first switch is configured to turn off.

15. The wave shaping circuit of claim 12 , wherein when the output voltage becomes about equal to the input voltage, the second switch is configured to turn on and the first switch is configured to remain off.

16. The wave shaping circuit of claim 12 , wherein when the output voltage becomes about equal to the input voltage, the second switch is configured to turn on and the first switch is configured to turn on.

17. The wave shaping circuit of claim 12 , further comprising:
a third switch connected to the voltage source; and
an additional inductor connected in series between the third switch and the node when the third switch is turned on, wherein the third switch and the other inductor are connected in a parallel arrangement with the first switch and the inductor between the voltage source and the node,
wherein, when the input voltage begins the ramp-down input voltage transition between the second voltage value and the first voltage value, at least one of the first switch and the third switch is configured to turn on and the second switch is configured to turn off, such that the capacitor discharges both into the load and into the voltage source, thereby decreasing the slope magnitude of the output voltage transition of the output voltage to less than the ramp-down input voltage transition.

18. A control device configured to provide a supply voltage to an output transistor of a power amplifier configured to amplify an input signal, the control devic

Assignees

• Avago Technologies General Ip

Inventors

• Vice Michael Wendell
• Hwang Sungkil

Classifications

• H03G3/3042

  in modulators, frequency-changers, transmitters or power amplifiers · CPC title

• H03F2200/102

  A non-specified detector of a signal envelope being used in an amplifying circuit · CPC title

• H03K6/04

  Modifying slopes of pulses, e.g. S-correction (S-correction in television H04N3/23) · CPC title

• H03F3/19

  with semiconductor devices only · CPC title

• H03K5/01 Primary

  Shaping pulses (discrimination against noise or interference H03K5/125) · CPC title