Micro-light-emitting diode device and method for manufacturing the same

US9825200B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9825200-B2
Application numberUS-201615060885-A
CountryUS
Kind codeB2
Filing dateMar 4, 2016
Priority dateMay 13, 2015
Publication dateNov 21, 2017
Grant dateNov 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A micro-light-emitting diode (micro-LED) device includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first semiconductor layer includes a first bottom surface. The active layer is disposed on the first semiconductor layer. The second semiconductor layer disposed on the active layer includes a second bottom surface. A surface of the second semiconductor layer opposite to the active layer is a light-exiting surface of the micro-LED device. The second semiconductor layer has different thicknesses, in which a minimum thickness of the second semiconductor layer is located at an edge or at least one side of the second semiconductor layer. Vertical-projection zones of the first semiconductor layer, the active layer, and the second semiconductor layer on the first bottom surface are substantially the same.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a micro-light-emitting diode device comprising: providing a first substrate; depositing a mask layer on the first substrate; patterning the mask layer to expose a portion of the first substrate; etching the exposed portion of the first substrate to form a recess, and a depth at a center of the recess being greater than a depth at an edge of the recess; removing the mask layer; forming a micro-light-emitting diode device comprising: depositing a second semiconductor layer on the recess; depositing an active layer on the second semiconductor layer, wherein the recess is filled with a portion of the second semiconductor layer; and depositing a first semiconductor layer on the active layer; transferring and reversing the first substrate and the micro-light-emitting diode device to a second substrate, the first semiconductor layer of the micro-light-emitting diode device being connected to the second substrate; etching the first semiconductor layer, the active layer and the second semiconductor layer in a same time to define a size of the micro-light-emitting diode device; and removing the first substrate. 2. The method of claim 1 , wherein the second semiconductor layer is deposited in the recess and fills and levels up the recess. 3. The method of claim 1 , wherein the portion of the first substrate is etched to form a first shape, and the second semiconductor layer is deposited on the recess to form a light-exiting surface, the light-exiting surface has a second shape, and the first shape and the second shape are the same. 4. The method of claim 1 , further comprising: providing a panel, and forming at least one thin film transistor on the panel; gripping the micro-light-emitting diode device to allow the micro-light-emitting diode device to be separated from the second substrate, and moving the micro-light-emitting diode device onto the thin film transistor; and forming an electrode layer on the second semiconductor layer of the micro-light-emitting diode device.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H01L33/005Primary

    Electricity · mapped topic

  • Roughened surfaces, e.g. at the interface between epitaxial layers · CPC title

  • H10H20/819Primary

    characterised by their shape, e.g. curved or truncated substrates · CPC title

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Frequently asked questions

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What does patent US9825200B2 cover?
A micro-light-emitting diode (micro-LED) device includes a first semiconductor layer, an active layer, and a second semiconductor layer. The first semiconductor layer includes a first bottom surface. The active layer is disposed on the first semiconductor layer. The second semiconductor layer disposed on the active layer includes a second bottom surface. A surface of the second semiconductor la…
Who is the assignee on this patent?
Au Optronics Corp
What technology area does this patent fall under?
Primary CPC classification H01L33/005. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).