Signal interrupts in a transactional memory system

US9824040B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9824040-B2
Application numberUS-201314068214-A
CountryUS
Kind codeB2
Filing dateOct 31, 2013
Priority dateSep 9, 2013
Publication dateNov 21, 2017
Grant dateNov 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In some embodiments, a method includes executing an atomic transaction in a system having a transactional memory. The method includes receiving a signal interrupt during executing of the atomic transaction. The method includes storing a state of the signal interrupt to enable subsequent execution of the signal interrupt. The method includes returning to executing the atomic transaction until the atomic transaction is at least one of completed and aborted. The method includes after executing the atomic transaction is at least one of completed and aborted, determining whether the signal interrupt is received during executing of the atomic transaction. The method includes after determining that the signal interrupt is received during executing of the atomic transaction, retrieving the state of the signal interrupt. The method includes executing an interrupt handler for processing the signal interrupt and returning from executing of the atomic transaction.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: beginning execution of an atomic transaction in a system having a transactional memory; during executing of the atomic transaction: receiving a signal interrupt; determining whether an interrupt handler for processing the signal interrupt includes an instruction that would be detectable external to the atomic transaction; in response to determining the interrupt handler does include the instruction that would be detectable external to the atomic transaction, ceasing execution of the interrupt handler and continuing execution of the atomic transaction; and in response to determining the interrupt handler does not include the instruction that would be detectable external to the atomic transaction, executing the instruction. 2. The method of claim 1 further comprising: determining whether the atomic transaction can be rolled back; and in response to determining the atomic transaction cannot be rolled back: storing a state of the interrupt handler; and subsequent to completion of the atomic transaction, executing the interrupt handler based upon the state. 3. The method of claim 2 , further comprising: in response to determining the atomic transaction can be rolled back: determining whether a timeout threshold has been exceeded; and in response to determining the timeout threshold has been exceeded: rolling back the atomic transaction; executing the interrupt handler for processing the signal interrupt; and re-executing the atomic transaction. 4. The method of claim 1 , further comprising defining an alternative location for stack execution. 5. The method of claim 1 further comprising: determining whether the signal interrupt comprises a signal to abort a process comprising the atomic transaction; and in response to determining that the signal interrupt comprises the signal to abort the process, ceasing executing the atomic transaction and executing the interrupt handler for processing the signal interrupt. 6. The method of claim 5 further comprising in response to determining that the signal interrupt comprises the signal to abort the process: aborting the atomic transaction and threads that are part of the process. 7. The method of claim 1 , wherein the atomic transaction comprises a transaction having operations that are non-detectable external to the atomic transaction.

Assignees

Inventors

Classifications

  • Transaction processing · CPC title

  • by interrupt, e.g. masked · CPC title

  • G06F13/24Primary

    using interrupt (G06F13/32 takes precedence) · CPC title

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Frequently asked questions

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What does patent US9824040B2 cover?
In some embodiments, a method includes executing an atomic transaction in a system having a transactional memory. The method includes receiving a signal interrupt during executing of the atomic transaction. The method includes storing a state of the signal interrupt to enable subsequent execution of the signal interrupt. The method includes returning to executing the atomic transaction until th…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F13/24. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).