Flexible electronics for wearable healthcare sensors

Patent metadata

Field	Value
Publication number	US-9822002-B1
Application number	US-201615262897-A
Country	US
Kind code	B1
Filing date	Sep 12, 2016
Priority date	Sep 12, 2016
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an adhesive layer on the top side of the structure. Aspects also include depositing a release layer and a glass layer on the top side of the structure. Aspects also include reducing a thickness of the silicon substrate on the bottom side of the structure.

First claim

What is claimed is:

1. A method of manufacturing a flexible electronic structure, the electronic structure having a top side and a bottom side, the method comprising:
patterning a metal conductive material on a silicon substrate on the top side of the structure;
depositing an adhesive layer on the top side of the structure;
depositing a release layer and a glass layer on the top side of the structure;
reducing a thickness of the silicon substrate on the bottom side of the structure to a thickness of 1 μm to 50 μm;
applying a polymer microchannel layer comprising a plurality of vias to the top side of the structure; and
filling the vias with a conductive metal material that is liquid at room temperature such that the conductive metal material that is liquid at room temperature contacts the metal conductive material.

2. The method of manufacturing according to claim 1 , wherein reducing the thickness of the silicon substrate comprises grinding the substrate.

3. The method of manufacturing according to claim 1 , wherein reducing the thickness of the silicon substrate comprises performing CMP.

4. The method of manufacturing according to claim 1 , further comprising etching the silicon substrate.

5. The method of manufacturing according to claim 1 , further comprising depositing a polymer layer on the bottom side of the structure.

6. The method of manufacturing according to claim 1 , further comprising removing the glass layer and the adhesive layer from the structure.

7. The method of manufacturing according to claim 1 , wherein the conductive metal material is a metal alloy consisting essentially of gallium, indium, and tin.

8. A method for manufacturing a flexible electronic structure having a top side and a bottom side, the method comprising:
patterning a metal on a silicon substrate on the top side of the structure;
etching the silicon substrate on the top side of the structure with deep reactive ion etch;
depositing an adhesive layer on the top side of the structure;
depositing a release layer and a glass layer on the top side of the structure;
reducing a thickness of the silicon substrate on the bottom side of the structure to a thickness of 1 μm to 50 μm;
applying a polymer microchannel layer comprising a plurality of vias to the top side of the structure; and
filling the vias with a conductive metal material that is liquid at room temperature such that the conductive metal material that is liquid at room temperature contacts the metal.

9. The method of manufacturing according to claim 8 , further comprising applying UV release tape to the etched silicon substrate on the bottom side of the structure.

10. The method of manufacturing according to claim 8 , further comprising removing the release layer, the glass layer, and the adhesive layer from the structure.

11. The method of manufacturing according to claim 10 , further comprising, after removing the release layer, the glass layer, and the adhesive layer, applying transfer tape to the silicon layer on the top side of the structure.

12. The method of manufacturing according to claim 11 , further comprising applying a polymer layer to the bottom side of the structure and removing the transfer tape and the adhesive layer from the structure.

13. A method of manufacturing a flexible electronic structure, the electronic structure having a top side and a bottom side, the method comprising:
doping a silicon substrate on the top side of the structure with a dopant to form a doped region;
depositing a metal ohmic contact material on the doped region;
depositing an adhesive layer on the top side of the structure;
depositing a release layer and a glass layer on the top side of the structure;
reducing a thickness of the silicon substrate on the bottom side of the structure to a thickness of 1 μm to 50 μm;
applying a polymer microchannel layer comprising a plurality of vias to the top side of the structure; and
filling the vias with a conductive metal material that is liquid at room temperature such that the conductive metal material that is liquid at room temperature contacts the metal ohmic contact material.

14. The method of manufacturing according to claim 13 , wherein the doping is selective doping to create a doped region.

15. The method of manufacturing according to claim 13 , wherein the dopant is boron, phosphorus, or a combination thereof.

16. The method of manufacturing according to claim 13 , wherein reducing the thickness of the silicon substrate comprises performing CMP.

17. The method of manufacturing according to claim 13 , further comprising etching the silicon substrate.

18. The method of manufacturing according to claim 13 , further comprising depositing a polymer layer on the bottom side of the structure and removing the glass layer and the adhesive layer from the structure.

19. The method of manufacturing according to claim 1 , wherein the conductive metal material that is liquid at room temperature comprises a eutectic liquid metal alloy.

20. The method of manufacturing according to claim 7 , wherein the gallium is present in an amount of 68.5% by weight, the indium is present in an amount of 21.5% by weight, and the tin is present in an amount of 10% by weight, relative to the total weight of the conductive metal material.

Assignees

• IBM

Inventors

• Andry Paul S
• Hu Huan
• Sakuma Katsuyuki

Classifications

• B81C1/0038 Primary

  Processes for creating layers of materials not provided for in groups B81C1/00357 - B81C1/00373 · CPC title

• B81B2201/0292

  Sensors not provided for in B81B2201/0207 - B81B2201/0285 · CPC title

• B81B2207/07

  Interconnects · CPC title

• B81C2201/0195

  the layer being unstructured · CPC title

• B81B3/0097

  Devices comprising flexible or deformable elements not provided for in groups B81B3/0002 - B81B3/0094 · CPC title