Method of packaging a semiconductor chip using a 3D printing process and semiconductor package having angled surfaces

Patent metadata

Field	Value
Publication number	US-9818665-B2
Application number	US-201414193480-A
Country	US
Kind code	B2
Filing date	Feb 28, 2014
Priority date	Feb 28, 2014
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

In one aspect, a method of packaging a semiconductor module includes providing a semiconductor module having a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface. A packaging assembly is formed at least partly by a 3D printing process. The packaging assembly includes the semiconductor module and a protective covering that extends over the first surface.

First claim

The invention claimed is:

1. A method of packaging a semiconductor module, the method comprising:
providing a semiconductor module comprising a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface; and
forming a packaging assembly at least partly by a 3D printing process, the package assembly comprising the semiconductor module and a protective covering that laterally extends over the first surface so as to cover at least a portion of the first surface, wherein the protective covering is formed by the 3D printing process,
wherein forming the packaging assembly comprises forming the protective covering directly on the first surface of the semiconductor module by the 3D printing process,
wherein the protective covering is formed by printing a 3D layer extending from first and second locations on the first surface and spaced apart from the edge sides of the semiconductor module such that the protective covering comprises a cavity defined by an inner surface of the 3D layer and a portion of the first surface, and
wherein a portion of the 3D layer that laterally extends over the semiconductor module is spaced apart from the semiconductor module such that a region of the cavity between the semiconductor module and the portion of the 3D layer that laterally extends over the semiconductor module is devoid of material.

2. The method of claim 1 , further comprising forming an overmold structure adjoining the protective covering by a molding process.

3. A method of packaging a semiconductor module, the method comprising:
providing a semiconductor module comprising a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface; and
forming a packaging assembly at least partly by a 3D printing process, the package assembly comprising the semiconductor module and a protective covering that laterally extends over the first surface so as to cover at least a portion of the first surface, wherein the protective covering is formed by the 3D printing process,
wherein forming the protective covering comprises forming a retrograde shape in the protective covering, and
wherein the portion of the 3D layer that laterally extends over the semiconductor module is formed to include an opening that exposes the semiconductor module to the exterior atmosphere.

4. A method of packaging a semiconductor module, the method comprising:
providing a semiconductor module comprising a first surface, a second surface opposite the first surface and edge sides extending between the first surface and the second surface; and
forming a packaging assembly at least partly by a 3D printing process, the package assembly comprising the semiconductor module and a protective covering that laterally extends over the first surface so as to cover at least a portion of the first surface, wherein the protective covering is formed by the 3D printing process,
wherein forming the protective covering comprises forming a 3D layer that laterally extends over the semiconductor module and is spaced apart from the semiconductor module, and
wherein the packaged semiconductor device is formed to include a cavity that is devoid of material between the semiconductor module and the portion of the 3D layer that laterally extends over the semiconductor module.

Assignees

• Infineon Technologies Ag

Inventors

• Elian Klaus
• Theuss Horst

Classifications

• B29K2033/04

  Polymers of esters · CPC title

• B29K2105/253

  Preform · CPC title

• B29C64/10

  Processes of additive manufacturing · CPC title

• B29C64/106

  using only liquids or viscous materials, e.g. depositing a continuous bead of viscous material · CPC title

• B81C1/00309

  suitable for fluid transfer from the MEMS out of the package or vice versa, e.g. transfer of liquid, gas, sound · CPC title