Multilayer ceramic capacitor and method of manufacturing multilayer ceramic capacitor

Patent metadata

Field	Value
Publication number	US-9818536-B2
Application number	US-201615171059-A
Country	US
Kind code	B2
Filing date	Jun 2, 2016
Priority date	Dec 10, 2013
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

A multilayer ceramic capacitor that includes an internal electrode containing at least one kind of metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb and dissolved in Ni to form a solid solution. The internal electrode has a ratio of A of 1.4 atomic percent or more to a total amount of A and Ni in a near-interface region located to a depth of 2 nm from a surface of the internal electrode facing a corresponding ceramic dielectric layer. A relation between a value X of atomic percent representing the ratio of A in the near-interface region and a value Y of atomic percent representing the ratio of A in a central region in a thickness direction of the internal electrode is X−Y≧1.0. Such a multilayer capacitor is formed by annealing a ceramic stack under a predetermined condition to increase the ratio of metal A in the near-interface region of the internal electrode.

First claim

The invention claimed is:

1. A multilayer ceramic capacitor comprising:
a ceramic stack having a plurality of stacked ceramic dielectric layers and a plurality of internal electrodes, each of the plurality of internal electrodes being interposed between adjacent ceramic layers of the plurality of ceramic dielectric layers; and
an external electrode on an outer surface of the ceramic stack and electrically connected to the internal electrodes,
the internal electrodes containing a solid solution of a Ni-A alloy, wherein A is at least one kind of metal selected from the group consisting of In, Ga, Zn, Bi, and Pb,
each internal electrode of the plurality of internal electrodes having a first region thereof located from a surface of the internal electrode to a depth of 2 nm therefrom, the surface of the internal electrode being a surface facing a corresponding one of the plurality of ceramic dielectric layers,
X−Y≧1.0,

wherein X is a first atomic percent representing a ratio of A in the first region to a total amount of A and Ni in the first region, and X is 1.4 atomic percent or more, and
Y is a second atomic percent representing a ratio of A in a second region of the internal electrode outside of the first region.

2. The multilayer ceramic capacitor according to claim 1 , wherein a ratio of A to a total amount of Ni and A in the Ni-A alloy is 1 mass %.

3. The multilayer ceramic capacitor according to claim 1 , wherein the second region is located at 0.2T or more inward from each of opposed surfaces of the internal electrode, and T is a thickness of the internal electrode.

4. A method of manufacturing a multilayer ceramic capacitor, the method comprising:
forming a un-fired ceramic stack having a plurality of un-fired ceramic dielectric layers and a plurality of un-fired internal electrode patterns, the plurality of un-fired internal electrode patterns being formed by applying an electrically conductive paste containing an Ni component and at least one kind of metal A component selected from the group consisting of In, Ga, Zn, Bi, and Pb, the plurality of un-fired internal electrode patterns being disposed along a respective plurality of interfaces between the un-fired ceramic dielectric layers;
firing the un-fired ceramic stack to obtain a fired ceramic stack having ceramic dielectric layers and internal electrode layers; and
annealing the fired ceramic stack under a predetermined condition to increase a ratio of A in a first region located from a surface of the internal electrode to a depth of 2 nm therefrom, the surface of the internal electrode being a surface facing a corresponding one of the ceramic dielectric layers.

5. The method of manufacturing a multilayer ceramic capacitor according to claim 4 , wherein:
X−Y≧1.0,

X is a first atomic percent representing the ratio of A in the first region to a total amount of A and Ni in the first region, and X is 1.4 atomic percent or more, and
Y is a second atomic percent representing a ratio of A in a second region of the internal electrode outside of the first region.

6. The method of manufacturing a multilayer ceramic capacitor according to claim 5 , wherein a ratio of A to a total amount of Ni and A in the Ni-A alloy is 1 mass %.

7. The method of manufacturing a multilayer ceramic capacitor according to claim 5 , wherein the second region is located at 0.2T or more inward from each of opposed surfaces of the internal electrode, and T is a thickness of the internal electrode.

8. The method of manufacturing a multilayer ceramic capacitor according to claim 7 , wherein the external electrode is formed by applying and baking a conductive paste on the at least one end of the fired ceramic stack.

9. The method of manufacturing a multilayer ceramic capacitor according to claim 4 , the firing is conducted in a reducing atmosphere of H2-N2-H20 gas at an oxygen partial pressure of 10 −10 to 10 −12 MPa, a temperature of the firing is raised at a rate of 20° C./min and the un-fired ceramic stack is fired at 1200° C. for 20 minutes.

10. The method of manufacturing a multilayer ceramic capacitor according to claim 4 , wherein the predetermined condition of the annealing is an oxygen partial pressure of 10 −12 to 10 −15 MPa and a temperature of 800 to 1000° C. for one to four hours.

11. The method of manufacturing a multilayer ceramic capacitor according to claim 4 , further comprising forming an external electrode that is electrically connected to the internal electrodes on at least one end of the fired ceramic stack.

Assignees

• Murata Manufacturing Co

Inventors

• Suzuki Shoichiro
• Yamaguchi Shinichi
• Doi Akitaka

Classifications

• H01G4/1227

  based on alkaline earth titanates · CPC title

• H01G4/30

  Stacked capacitors (H01G4/33 takes precedence) · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

• H01G4/0085

  Fried electrodes · CPC title

• H01G4/008 Primary

  Selection of materials · CPC title