Method of synchronizing a driving module and display apparatus performing the method

US9818350B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9818350-B2
Application numberUS-201414294527-A
CountryUS
Kind codeB2
Filing dateJun 3, 2014
Priority dateJan 7, 2014
Publication dateNov 14, 2017
Grant dateNov 14, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method of synchronizing a driving module includes applying a plurality of original data enable (“DE”) signals to a plurality of timing controller of the driving module, respectively, generating a synch DE signal from the driving module based on the earliest signal among the original DE signals, and transferring the synch DE signal to the plurality of timing controllers in a cascade mode.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of synchronizing a driving module, the method comprising: applying a plurality of original data enable signals, each of which is from an external system of the driving module, to a plurality of timing controllers of the driving module, respectively; generating a synch data enable signal from the driving module based on the earliest signal among the original data enable signals; and transferring the synch data enable signal to the timing controllers in a cascade mode. 2. The method of claim 1 , wherein a master timing controller of the timing controllers is configured to determine an original data enable signal applied thereto as a first data enable signal, and to transfer the first data enable signal to a slave timing controller of the timing controllers. 3. The method of claim 2 , wherein a first slave timing controller of the timing controllers is configured to determine an earlier signal of an original data enable signal applied thereto and the first data enable signal as a second data enable signal, and to transfer the second data enable signal to a second slave timing controller of the timing controller. 4. The method of claim 3 , wherein a last slave timing controller of the timing controllers is configured to generate the synch data enable signal, which is delayed by a predetermined period from an earlier signal of an original data enable signal applied thereto and a data enable signal received from a previous slave timing controller thereof. 5. The method of claim 4 , wherein the last slave timing controller is configured to transfer the synch data enable signal to a plurality of previous timing controllers thereof in the cascade mode. 6. The method of claim 1 , wherein each of the timing controllers is configured to write image data at a memory thereof based on the original data enable signal applied thereto, and read out the image data from the memory based on the synch data enable signal. 7. The method of claim 1 , wherein the synch data enable signal is generated once during a frame period. 8. A display apparatus comprising: a driving module comprising a plurality of timing controllers, wherein the driving module is configured to generate a synch data enable signal based on the earliest signal among a plurality of original data enable signals, each of which is applied from an external system of the driving module, to the timing controllers, respectively, and to transfer the synch data enable signal to the timing controllers in a cascade mode; and a display panel configured to display an image on a plurality of display blocks thereof based on a control by the timing controllers, which are synchronized with each other based on the synch data enable signal. 9. The display apparatus of claim 8 , wherein a master timing controller of the timing controllers is configured to determine an original data enable signal applied thereto as a first data enable signal, and to transfer the first data enable signal to a slave timing controller of the timing controllers. 10. The display apparatus of claim 9 , wherein a first slave timing controller of the timing controllers is configured to determine an earlier signal of an original data enable signal applied thereto and the first data enable signal as a second data enable signal, and to transfer the second data enable signal to a second slave timing controller of the timing controllers. 11. The display apparatus of claim 9 , wherein a last slave timing controller of the timing controllers is configured to generate the synch data enable signal, which is delayed by a predetermined period from an earlier signal of an original data enable signal applied thereto and a data enable signal received from a previous slave timing controller thereof. 12. The display apparatus of claim 11 , wherein the last slave timing controller of the timing controllers is configured to transfer the synch data enable signal to a plurality of a plurality of previous timing controllers thereof in the cascade mode. 13. The display apparatus of claim 8 , wherein each of the timing controllers comprises a memory, and each of the timing controllers is configured to write image data at the memory thereof based on the original data enable signal applied thereto, and to read out the image data from the memory based on the synch data enable signal. 14. The display apparatus of claim 8 , wherein each of the timing controllers comprises: a first input pin configured to receive a data enable signal of a previous slave timing controller; a first output pin configured to output a data enable signal thereof to a next slave timing controller; a second input pin configured to receive the synch data enable signal from the next slave timing controller; and a second output pin configured to output the synch data enable signal to the previous slave timing controller. 15. The display apparatus of claim 8 , wherein the driving module further comprises a printed circuit board, on which a timing controller of the timing controllers is disposed. 16. The display apparatus of claim 8 , wherein the driving module further comprises a plurality of printed circuit boards, on which the timing controllers are disposed, each of the printed circuit boards comprise a first connector and a second connector, the first connector of a printed circuit board is connected to the second connector of a next printed circuit board, and the second connector of the printed circuit board is connected to the first connector of a previous printed circuit board. 17. The display apparatus of claim 16 , wherein the first connector comprises: a first output terminal configured to output a data enable signal; and a first input terminal configured to receive the synch data enable signal, and the second connector comprises: a second input terminal configured to receive a data enable signal; and a second output terminal configured to output the synch data enable signal. 18. The display apparatus of claim 8 , wherein the display blocks extend substantially in a first direction, which is an extending direction of a data line in the display panel, and the display blocks are arranged substantially in a second direction, which is an extending direction of a gate line in the display panel. 19. The display apparatus of claim 8 , wherein the display blocks are arranged substantially in a matrix form. 20. The display apparatus of claim 8 , wherein a number of the timing controllers is equal to a number of the display blocks.

Assignees

Inventors

Classifications

  • Platforms with lifting and lowering devices · CPC title

  • G09G3/3666Primary

    with the matrix divided into sections · CPC title

  • B66F11/044Primary

    Working platforms suspended from booms · CPC title

  • Synchronisation between the display unit and other units, e.g. other display units, video-disc players · CPC title

  • display composed of modules, e.g. video walls · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9818350B2 cover?
A method of synchronizing a driving module includes applying a plurality of original data enable (“DE”) signals to a plurality of timing controller of the driving module, respectively, generating a synch DE signal from the driving module based on the earliest signal among the original DE signals, and transferring the synch DE signal to the plurality of timing controllers in a cascade mode.
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3666. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 14 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).