Method of establishing pre-fetch control information from an executable code and an associated NVM controller, a device, a processor system and computer program products

Patent metadata

Field	Value
Publication number	US-9817763-B2
Application number	US-201314759206-A
Country	US
Kind code	B2
Filing date	Jan 11, 2013
Priority date	Jan 11, 2013
Publication date	Nov 14, 2017
Grant date	Nov 14, 2017

Abstract

A method of establishing pre-fetch control information from an executable code is described. The method comprises inspecting the executable code to find one or more instructions corresponding to an unconditional change in program flow during an execution of the executable code when the executable code is retrieved from a non-volatile memory comprising a plurality of NVM lines. For each unconditional change of flow instruction, the method comprises establishing a NVM line address of the NVM line containing said unconditional change of flow instruction; establishing a destination address associated with the unconditional change of flow instruction; determining whether the destination address is in an address range corresponding to a NVM-pre-fetch starting from said NVM line address; establishing a pre-fetch flag indicating whether the destination address is in the address range corresponding to a NVM-pre-fetch starting from said NVM line address; and recording the pre-fetch flag in a pre-fetch control information record.

First claim

The invention claimed is:

1. A method of establishing pre-fetch control information from an executable code, the method comprising:
inspecting the executable code to find one or more instructions corresponding to an unconditional change in program flow during an execution of the executable code when the executable code is retrieved from a non-volatile memory [NVM] comprising a plurality of NVM lines; and
for each unconditional change of flow instruction in the executable code:
establishing a NVM line address of the NVM line containing said unconditional change of flow instruction;
establishing a destination address associated with the unconditional change of flow instruction;
determining whether the destination address is in an address range corresponding to a NVM-pre-fetch starting from said NVM line address;
establishing a pre-fetch flag indicating whether the destination address is in the address range corresponding to a NVM-pre-fetch starting from said NVM line address; and
recording the pre-fetch flag in a pre-fetch control information record.

2. A method according to claim 1 , the method further comprising:
storing the pre-fetch control information record in a part of the NVM memory.

3. A method according to claim 1 , the method further comprising:
storing the pre-fetch control information record in a local fast access temporary storage area, such as a plurality of registers or a RAM array of the NVM controller.

4. A method according to claim 1 , the method further comprising:
storing the pre-fetch control information record in a pre-fetch control information file.

5. A method according to claim 1 , the method further comprising:
linking the pre-fetch control information record into a binary file together with the executable code for allowing the pre-fetch control information record to be programmed into the NVM memory together with the executable code when programming the binary file into the NVM memory.

6. A method according to claim 1 , wherein:
the inspecting the executable code to find one or more unconditional change of flow instructions comprises checking the executable code for one or more presences of one or more pre-determined primary opcode fields in opcodes of the executable code, and
establishing the destination address associated with the unconditional change of flow instruction comprises retrieving the destination address from an associated extended opcode field in an associated opcode of the executable code.

7. A method according to claim 1 , wherein each NVM line comprises 256 data bits and, optionally 32 ECC bits.

8. A method according to claim 1 , wherein the NVM memory is a flash memory.

9. A method according to claim 1 , wherein the one or more unconditional change of flow instructions comprise at least one of a branch instruction, an end of function, an end of handler, an end of task, and a system call instruction.

10. A NVM controller associated with a NVM memory, the NVM controller comprising a pre-fetch logic and a pre-fetch buffer,
the pre-fetch logic being arranged to:
in a setup-phase prior to execution of the executable code:
receive an executable code for storing in a NVM memory;
store the executable code in the NVM memory; and
receive pre-fetch control information comprising one or more pre-fetch flags associated with the executable code, the pre-fetch control information being established externally according to claim 1 ; and

in an execution phase associated with execution of the executable code:
pre-fetch pre-fetched data from the NVM memory according to one or more pre-fetch flags established by said method, and
store the pre-fetched data in the pre-fetch buffer.

11. A NVM controller according to claim 10 , the pre-fetch logic further arranged to:
in the setup-phase, store at least the pre-fetch flags established by said method in the NVM memory;
at a start of the execution phase:
retrieve at least the pre-fetch flags established by said method from the NVM memory,
copy the pre-fetch flags to a local fast access temporary storage area, such as a plurality of registers or a RAM array of the NVM controller,

during the execution phase:
before fetching a NVM line from the NVM memory, retrieve associated pre-fetch flags from the local fast access temporary storage area,
using the associated pre-fetch flags to determine whether a pre-fetch of a NVM line is to be performed, and
if a pre-fetch of the NVM line is to be performed, fetching the NVM line from the NVM memory.

12. A NVM controller according to claim 10 , the pre-fetch logic further arranged to:
in the setup-phase, store at least the pre-fetch flags established by said method to a local fast access temporary storage area, such as a plurality of registers or a RAM array of the NVM controller;
during the execution phase:
before fetching a NVM line from the NVM memory, retrieve associated pre-fetch flags from the local fast access temporary storage area,
using the associated pre-fetch flags to determine whether a pre-fetch of a NVM line is to be performed, and
if a pre-fetch of the NVM line is to be performed, fetching the NVM line from the NVM memory.

13. A NVM controller associated with a NVM memory, the NVM controller comprising a pre-fetch logic and a pre-fetch buffer,
the pre-fetch logic being arranged to:
in a setup-phase prior to execution of executable code, inspect the executable code to find a instruction corresponding to an unconditional change in program flow, for the unconditional change of flow instruction in the executable code:
receive an executable code for storing in a NVM memory;
store the executable code in the NVM memory; and
establish pre-fetch control information comprising one or more pre-fetch flags from the executable code; and

in an execution phase associated with execution of the executable code:
pre-fetch pre-fetched data from the NVM memory according to one or more pre-fetch flags, and
store the pre-fetched data in the pre-fetch buffer.

14. A NVM controller according to claim 13 , the pre-fetch logic further arranged to:
during the execution phase, provide pre-fetched data to a processor.

15. A NVM controller according to claim 13 , the NVM controller being arranged to receive a plurality of executable codes associated with a corresponding plurality of processors, and arranged to pre-fetch from the NVM memory according to pre-fetch flags established by said method for each of the executable codes and each of the processors.

16. A NVM controller according to claim 13 , the NVM controller comprising a flash controller and the NVM memory comprising a flash memory.

17. A device comprising a NVM memory for storing one or more executable codes, an associated NVM controller according to claim 13 , and one or more processors arranged to execute the one or more executable codes.

18. A processor system arranged to:
obtain an executable code suitable to be programmed in a NVM memory from:
receiving an executable code, or
generating an executable code from at least one of an object code file, an assembly code, a pre-processed code, a source code, and one or more library files;

inspect the executable code to find a instruction corresponding to an unconditional change in program flow, for the unconditional change of flow instruction in the executable code:
establish NVM memory information associated of the NVM memory, the NVM memory information comprising NVM line addresses associated with a plurality of NVM lines of the NVM memory,
perform a method of establishing p

Assignees

• Robertson Alistair
• Amedeo Nancy
• Maiolani Mark
• Nxp Usa Inc

Inventors

• Robertson Alistair
• Amedeo Nancy
• Maiolani Mark

Classifications

• G06F12/0873

  Mapping of cache memory to specific storage devices or parts thereof · CPC title

• G06F9/3814

  Implementation provisions of instruction buffers, e.g. prefetch buffer; banks · CPC title

• G06F9/3802

  Instruction prefetching · CPC title

• G06F2212/6028

  Prefetching based on hints or prefetch instructions · CPC title

• G06F9/30054

  Unconditional branch instructions · CPC title